The Journal of Signal Processing Systems, Volume 52

Volume 52, Number 1, July 2008

• Robert T. Grisamore, Earl E. Swartzlander Jr.:
  Negative Save Sign Extension for Multi-term Adders and Multipliers. 1-11
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• Hyunuk Jung, Hoeseok Yang, Soonhoi Ha:
  Optimized RTL Code Generation from Coarse-Grain Dataflow Specification for Fast HW/SW Cosynthesis. 13-34
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• F. Angarita, Ma José Canet, T. Sansaloni, Javier Valls, Vicenc Almenar-Terre:
  Architectures for the Implementation of a OFDM-WLAN Viterbi Decoder. 35-44
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• Albert Mo Kim Cheng, Yan Wang:
  A Dynamic Voltage Scaling Algorithm for Dynamic Workloads. 45-57
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• Yen-Liang Chen, Ming-Feng Hsu, Jyh-Ting Lai, An-Yeu Wu:
  Cost-Effective Joint Echo-NEXT Canceller Designs for 10GBase-T Ethernet Systems Based on a Shortened Impulse Response Filter (SIRF) Scheme. 59-73
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• Fredrik Kristensen, Hugo Hedberg, Hongtu Jiang, Peter Nilsson, Viktor Öwall:
  An Embedded Real-Time Surveillance System: Implementation and Evaluation. 75-94
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• Yanmei Qu, Shunliang Mei, Yun He:
  A Cost-effective VLD Architecture for MPEG-2 and AVS. 95-109
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Volume 52, Number 2, August 2008

• Yu Li, Yun He:
  Bandwidth Optimized and High Performance Interpolation Architecture in Motion Compensation for H.264/AVC HDTV Decoder. 111-126
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• Chua-Chin Wang, Gang-Neng Sung, Pai-Li Liu:
  Power-Aware Design of An 8-Bit Pipelining ANT-Based CLA Using Data Transition Detection. 127-135
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• Mariusz Bajger, Amos Omondi:
  Low-error, High-speed Approximation of the Sigmoid Function for Large FPGA Implementations. 137-151
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• Shi-Huang Chen, Yaotsu Chang, Jiun-Ching Ruan:
  An Efficient Computation of LSP Frequencies Using Modified Complex-Free Ferrari Formula. 153-163
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• H. Cheng, S. C. Chan, Z. G. Zhang:
  Robust Channel Estimation and Multiuser Detection for MC-CDMA Systems Under Narrowband Interference. 165-180
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• F. Angarita, Ma José Canet, T. Sansaloni, A. Perez-Pascual, Javier Valls:
  Efficient Mapping of CORDIC Algorithm for OFDM-Based WLAN. 181-191
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• Hua Wang, Francky Catthoor, Miguel Miranda, Wim Dehaene:
  Synthesis of Runtime Switchable Pareto Buffers Offering Full Range Fine Grained Energy/Delay Trade-Offs. 193-210
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Volume 52, Number 3, September 2008

• Chun-Lung Hsu, Yu-Sheng Huang:
  A Fast-Deblocking Boundary-strength Based Architecture Design of Deblocking Filter in H.264/AVC Applications. 211-229
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• Pilar Reyes, Pedro Reviriego, Juan Antonio Maestro, Oscar Ruano:
  Fault Tolerance Analysis of Communication System Interleavers: the 802.11a Case Study. 231-247
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• Awais M. Kamboh, Andrew Mason, Karim G. Oweiss:
  Analysis of Lifting and B-Spline DWT Implementations for Implantable Neuroprosthetics. 249-261
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• Zhiguo Zhang, Shing-Chow Chan, Ka-Leung Ho, K. C. Ho:
  On Bandwidth Selection in Local Polynomial Regression Analysis and Its Application to Multi-resolution Analysis of Non-uniform Data. 263-280
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• Ch. Rambabu, I. Chakrabarti:
  An Efficient Hillclimbing-based Watershed Algorithm and its Prototype Hardware Architecture. 281-295
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• Thomas Lenart, Mats Gustafsson, Viktor Öwall:
  A Hardware Acceleration Platform for Digital Holographic Imaging. 297-311
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• Chiou-Yng Lee, Che Wun Chiou:
  New Bit-Parallel Systolic Architectures for Computing Multiplication, Multiplicative Inversion and Division in GF(2^m) Under Polynomial Basis and Normal Basis Representations. 313-324
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