Michele Stucchi

2008
7	EE	Jin Guo, Antonis Papanikolaou, Michele Stucchi, Kristof Croes, Zsolt Tokei, Francky Catthoor: A tool flow for predicting system level timing failures due to interconnect reliability degradation. ACM Great Lakes Symposium on VLSI 2008: 291-296
2006
6	EE	Evelyn Grossar, Michele Stucchi, Karen Maex, Wim Dehaene: Statistically Aware SRAM Memory Array Design. ISQED 2006: 25-30
5	EE	Mandeep Bamal, Youssef Travaly, Wenqi Zhang, Michele Stucchi, Karen Maex: Impact of interconnect resistance increase on system performance of low power and high performance designs. SLIP 2006: 85-90
2004
4	EE	Mandeep Bamal, Evelyn Grossar, Michele Stucchi, Karen Maex: Interconnect width selection for deep submicron designs using the table lookup method. SLIP 2004: 41-44
2003
3	EE	Antonis Papanikolaou, Miguel Miranda, Francky Catthoor, Henk Corporaal, Hugo De Man, David De Roest, Michele Stucchi, Karen Maex: Global interconnect trade-off for technology over memory modules to application level: case study. SLIP 2003: 125-132
2002
2	EE	Hasan Ymeri, Bart Nauwelaers, Karen Maex, David De Roest, Michele Stucchi, Servaas Vandenberghe: Simple and Efficient Approach for Shunt Admittance Parameters Calculations of VLSI On-Chip Interconnects on Semiconducting Substrate. DATE 2002: 1113
1	EE	Antonis Papanikolaou, Miguel Miranda, Francky Catthoor, Henk Corporaal, Hugo De Man, David De Roest, Michele Stucchi, Karen Maex: Interconnect exploration for future wire dominated technologies. SLIP 2002: 105-106

Coauthor Index

1	Mandeep Bamal	[4] [5]
2	Francky Catthoor	[1] [3] [7]
3	Henk Corporaal	[1] [3]
4	Kristof Croes	[7]
5	Wim Dehaene	[6]
6	Evelyn Grossar	[4] [6]
7	Jin Guo	[7]
8	Karen Maex	[1] [2] [3] [4] [5] [6]
9	Hugo De Man	[1] [3]
10	Miguel Miranda	[1] [3]
11	Bart Nauwelaers	[2]
12	Antonis Papanikolaou	[1] [3] [7]
13	David De Roest	[1] [2] [3]
14	Zsolt Tokei	[7]
15	Youssef Travaly	[5]
16	Servaas Vandenberghe	[2]
17	Hasan Ymeri	[2]
18	Wenqi Zhang	[5]