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B. Alorda

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2005
9EEB. Alorda, Sebastià A. Bota, Jaume Segura: A Non-Intrusive Built-In Sensor for Transient Current Testing of Digital VLSI Circuits. IOLTS 2005: 177-182
2004
8EEB. Alorda, Vicens Canals, Ivan de Paúl, Jaume Segura: A BIST-based Charge Analysis for Embedded Memories. IOLTS 2004: 199-206
7EEB. Alorda, Vincent Canals, Jaume Segura: A Two-Level Power-Grid Model for Transient Current Testing Evaluation. J. Electronic Testing 20(5): 543-552 (2004)
2003
6EEB. Alorda, Jaume Segura: An Evaluation of Built-in vs. Off-chip Strategies for On-line Transient Current Testing. IOLTS 2003: 178-182
5EEB. Alorda, B. Bloechel, Ali Keshavarzi, Jaume Segura: CHARDIN: An Off-Chip Transient Current Monitor with Digital Interface for Production Testing. ITC 2003: 719-726
2002
4EEB. Alorda, André Ivanov, Jaume Segura: An Off-Chip Sensor Circuit for On-Line Transient Current Testing. IOLTW 2002: 192
3EEB. Alorda, M. Rosales, Jerry M. Soden, Charles F. Hawkins, Jaume Segura: Charge Based Transient Current Testing (CBT) for Submicron CMOS SRAMs. ITC 2002: 947-953
2001
2EEIvan de Paúl, M. Rosales, B. Alorda, Jaume Segura, Charles F. Hawkins, Jerry M. Soden: Defect Oriented Fault Diagnosis for Semiconductor Memories using Charge Analysis: Theory and Experiments. VTS 2001: 286-291
2000
1EEB. Alorda, Ivan de Paúl, Jaume Segura, T. Miller: On-Line Current Testing for a Microprocessor Based Application with an Off-Chip Sensor. IOLTW 2000: 87-91

Coauthor Index

1B. Bloechel [5]
2Sebastià A. Bota [9]
3Vicens Canals [8]
4Vincent Canals [7]
5Charles F. Hawkins [2] [3]
6André Ivanov [4]
7Ali Keshavarzi [5]
8T. Miller [1]
9Ivan de Paúl [1] [2] [8]
10M. Rosales [2] [3]
11Jaume Segura [1] [2] [3] [4] [5] [6] [7] [8] [9]
12Jerry M. Soden [2] [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)