| 2008 |
|---|
| 75 | EE | Takao Okubo,
Hidehiko Tanaka:
Identifying Security Aspects in Early Development Stages.
ARES 2008: 1148-1155 |
| 2007 |
|---|
| 74 | EE | Takao Okubo,
Hidehiko Tanaka:
Secure Software Development through Coding Conventions and Frameworks.
ARES 2007: 1042-1051 |
| 73 | EE | Tomoyoshi Kinoshita,
Ibuki Handa,
Makoto Muto,
Shuichi Sakai,
Hidehiko Tanaka:
Musical part separation based on perceptual hierarchy.
Systems and Computers in Japan 38(2): 91-100 (2007) |
| 2005 |
|---|
| 72 | EE | Reiko Hamada,
Jun Okabe,
Ichiro Ide,
Shin'ichi Satoh,
Shuichi Sakai,
Hidehiko Tanaka:
Cooking navi: assistant for daily cooking in kitchen.
ACM Multimedia 2005: 371-374 |
| 71 | EE | Koichi Miura,
Motomu Takano,
Reiko Hamada,
Ichiro Ide,
Shuichi Sakai,
Hidehiko Tanaka:
Associating semantically structured cooking videos with their preparation steps.
Systems and Computers in Japan 36(2): 51-62 (2005) |
| 2004 |
|---|
| 70 | EE | Reiko Hamada,
Koichi Miura,
Ichiro Ide,
Shin'ichi Satoh,
Shuichi Sakai,
Hidehiko Tanaka:
Multimedia Integration for Cooking Video Indexing.
PCM (2) 2004: 657-664 |
| 2003 |
|---|
| 69 | EE | Koichi Miura,
Reiko Hamada,
Ichiro Ide,
Shuichi Sakai,
Hidehiko Tanaka:
Associating Cooking Video Segments with Preparation Steps.
CIVR 2003: 174-183 |
| 68 | EE | Hideyuki Miura,
Luong Dinh Hung,
Chitaka Iwama,
Daisuke Tashiro,
Niko Demus Barli,
Shuichi Sakai,
Hidehiko Tanaka:
Compiler-Assisted Thread Level Control Speculation.
Euro-Par 2003: 603-608 |
| 67 | EE | Yoshimitsu Yanagawa,
Luong Dinh Hung,
Chitaka Iwama,
Niko Demus Barli,
Shuichi Sakai,
Hidehiko Tanaka:
Complexity Analysis of a Cache Controller for Speculative Multithreading Chip Multiprocessors.
HiPC 2003: 393-404 |
| 66 | EE | Ichiro Ide,
Reiko Hamada,
Shuichi Sakai,
Hidehiko Tanaka:
Compilation of dictionaries for semantic attribute analysis of television news captions.
Systems and Computers in Japan 34(12): 32-44 (2003) |
| 2001 |
|---|
| 65 | EE | Chitaka Iwama,
Niko Demus Barli,
Shuichi Sakai,
Hidehiko Tanaka:
Improving Conditional Branch Prediction on Speculative Multithreading Architectures.
Euro-Par 2001: 413-417 |
| 64 | EE | Ichiro Ide,
Koji Yamamoto,
Reiko Hamada,
Hidehiko Tanaka:
An automatic video indexing method based on shot classification.
Systems and Computers in Japan 32(9): 32-41 (2001) |
| 2000 |
|---|
| 63 | | Mateo Valero,
Kazuki Joe,
Masaru Kitsuregawa,
Hidehiko Tanaka:
High Performance Computing, Third International Symposium, ISHPC 2000, Tokyo, Japan, October 16-18, 2000. Proceedings
Springer 2000 |
| 62 | EE | Ichiro Ide,
Reiko Hamada,
Shuichi Sakai,
Hidehiko Tanaka:
Scene identification in news video by character region segmentation.
ACM Multimedia Workshops 2000: 195-200 |
| 61 | EE | Reiko Hamada,
Ichiro Ide,
Shuichi Sakai,
Hidehiko Tanaka:
Structural analysis of cooking preparation steps in Japanese.
IRAL 2000: 157-164 |
| 1999 |
|---|
| 60 | EE | Reiko Hamada,
Ichiro Ide,
Shuichi Sakai,
Hidehiko Tanaka:
Associating video with related documents.
ACM Multimedia (2) 1999: 17-20 |
| 59 | EE | Masaaki Honda,
Takeo Igarashi,
Hidehiko Tanaka,
Shuichi Sakai:
Integrated Manipulation: Context-Aware Manipulation of 2D Diagrams.
ACM Symposium on User Interface Software and Technology 1999: 159-160 |
| 58 | EE | Antonio Magnaghi,
Shuichi Sakai,
Hidehiko Tanaka:
Inter-procedural Analysis for Parallelization of Java Programs.
ACPC 1999: 594-595 |
| 57 | EE | Ichiro Ide,
Reiko Hamada,
Shuichi Sakai,
Hidehiko Tanaka:
Relating Graphical Features with Concept Classes for Automatic News Video Indexing.
Intelligent Information Integration 1999 |
| 56 | EE | Takeo Igarashi,
Satoshi Matsuoka,
Hidehiko Tanaka:
Teddy: A Sketching Interface for 3D Freeform Design.
SIGGRAPH 1999: 409-416 |
| 1998 |
|---|
| 55 | EE | Takeo Igarashi,
Rieko Kadobayashi,
Kenji Mase,
Hidehiko Tanaka:
Path Drawing for 3D Walkthrough.
ACM Symposium on User Interface Software and Technology 1998: 173-174 |
| 54 | EE | Ichiro Ide,
Koji Yamamoto,
Hidehiko Tanaka:
Automatic Video Indexing Based on Shot Classification.
AMCP 1998: 87-102 |
| 53 | EE | Sachiko Kawachiya,
Takeo Igarashi,
Satoshi Matsuoka,
Hidehiko Tanaka:
Reduction of Overhead in Drawing Figures with Computer: Detailed Analyses of Drawing Tasks.
APCHI 1998: 11-18 |
| 1997 |
|---|
| 52 | EE | Takeo Igarashi,
Satoshi Matsuoka,
Sachiko Kawachiya,
Hidehiko Tanaka:
Interactive Beautification: A Technique for Rapid Geometric Design.
ACM Symposium on User Interface Software and Technology 1997: 105-114 |
| 51 | | Takuya Araki,
Hidehiko Tanaka:
Static Granularity Optimization of a Committed-Choice Language Fleng.
Euro-Par 1997: 1191-1200 |
| 50 | | Tomoyuki Uchida,
Hidehiko Tanaka:
An Automatic Document Coloring and Browsing System.
HCI (2) 1997: 275-278 |
| 49 | | Takeo Igarashi,
Sachiko Kawachiya,
Satoshi Matsuoka,
Hidehiko Tanaka:
In Search for an Ideal Computer-Assisted Drawing System.
INTERACT 1997: 104-111 |
| 1996 |
|---|
| 48 | EE | Takashi Matsumoto,
Tomohiro Kudoh,
Katsunobu Nishimura,
Kei Hiraki,
Hidehiko Tanaka:
Distributed Shared Memory Architecture for JUMP-1: A General-Purpose MPP Prototype.
ISPAN 1996: 131-137 |
| 1995 |
|---|
| 47 | | Kunio Kashino,
Kazuhiro Nakadai,
Tomoyoshi Kinoshita,
Hidehiko Tanaka:
Organization of Hierarchical Perceptual Sounds: Music Scene Analysis with Autonomous Processing Modules and a Quantitative Information Integration Mechanism.
IJCAI 1995: 158-164 |
| 1994 |
|---|
| 46 | EE | Tatsuhiko Tsunoda,
Hidehiko Tanaka:
Analysis of Scene Identification Ability of Associative Memory with Pictorial Dictionary.
COLING 1994: 310-318 |
| 45 | | Hidemoto Nakada,
Takuya Araki,
Hanpei Koike,
Hidehiko Tanaka:
A Fleng Compiler for PIE64.
IFIP PACT 1994: 257-266 |
| 44 | | Jun'ichi Tatemura,
Hanpei Koike,
Hidehiko Tanaka:
A Performance Debugger for a Parallel Logic Programming Language Fleng.
Theory and Practice of Parallel Programming 1994: 284-299 |
| 1993 |
|---|
| 43 | | Kentaro Shimada,
Hanpei Koike,
Hidehiko Tanaka:
The Instruction Set Architecture of the Inference Processor UNIRED II.
Architectures and Compilation Techniques for Fine and Medium Grain Parallelism 1993: 117-128 |
| 42 | | Yasuo Hidaka,
Hanpei Koike,
Hidehiko Tanaka:
Multiple Threads in Cyclic Register Windows.
ISCA 1993: 131-142 |
| 41 | | Jun'ichi Tatemura,
Hanpei Koike,
Hidehiko Tanaka:
Control and Data Flow Visualization for Parallel Logic Programs on a Multi-window Debugger HyperDEBU.
PARLE 1993: 414-425 |
| 40 | | Kentaro Shimada,
Hanpei Koike,
Hidehiko Tanaka:
UNIRED II: The High Performance Inference Processor for the Parallel Inference Machine PIE64.
New Generation Comput. 11(3): 251-269 (1993) |
| 1992 |
|---|
| 39 | | Kentaro Shimada,
Hanpei Koike,
Hidehiko Tanaka:
UNIRED II: The High Performance Inference Processor for the Parallel Inference Machine PIE64.
FGCS 1992: 715-722 |
| 38 | | Yasuo Hidaka,
Hanpei Koike,
Hidehiko Tanaka:
Architecture of Parallel Management Kernel for PIE64.
PARLE 1992: 685-700 |
| 37 | | Hidehiko Tanaka,
Jun'ichi Tatemura:
HyperDEBU: A Multiwindow Debugger for Parallel Logic Programs.
Parallel Symbolic Computing 1992: 162-182 |
| 36 | | Jun'ichi Tatemura,
Hanpei Koike,
Hidehiko Tanaka:
HyperDEBU: A Multiwindow Debugger for Parallel Logic Programs.
Programming Environments for Parallel Computing 1992: 87-105 |
| 1991 |
|---|
| 35 | EE | Tadashi Ohmori,
Masaru Kitsuregawa,
Hidehiko Tanaka:
Scheduling Batch Transactions on Shared-Nothing Parallel Database Machines: Effects of Concurrency and Parallelism.
ICDE 1991: 210-219 |
| 34 | | Yasuo Hidaka,
Hanpei Koike,
Jun'ichi Tatemura,
Hidehiko Tanaka:
A Static Load Partitioning Method based on Execution Profile for Committed Choice Languages.
ISLP 1991: 470-484 |
| 1990 |
|---|
| 33 | | Hiroshi Nakamura,
Yuji Kukimoto,
Masahiro Fujita,
Hidehiko Tanaka:
A Data Path Verifier for Register Transfer Level Using Temporal Logic Language Tokio.
CAV 1990: 76-85 |
| 32 | EE | Tadashi Ohmori,
Masaru Kitsuregawa,
Hidehiko Tanaka:
Concurrency Control of Bulk Access Transactions on Shared Nothing Parallel Database Machines.
ICDE 1990: 476-485 |
| 31 | | Qianshan He,
Hidehiko Tanaka:
An Object-Oriented Distributed System Integrating Multimedia Resources.
ICSI 1990: 682-691 |
| 30 | | Hidehiko Tanaka:
Permeation of Knowledge Information Processing Systems
New Generation Comput. 8(1): 1-3 (1990) |
| 1989 |
|---|
| 29 | | Hidehiko Tanaka:
A Parallel Object Oriented Language FLENG++ and Its Control System on the Parallel Machine PIE64.
Concurrency: Theory, Language, And Architecture 1989: 157-172 |
| 28 | | Lu Xu,
Hanpei Koike,
Hidehiko Tanaka:
Distributed Garbage Collection for the Parallel Inference Machine PIE64.
IFIP Congress 1989: 1161-1166 |
| 27 | | Hiroshi Nakamura,
Masaya Nakai,
Shinji Kono,
Masahiro Fujita,
Hidehiko Tanaka:
Logic Design Assistence Using Temporal Logic Based Language Tokio.
LP 1989: 174-183 |
| 26 | | Jun'ichi Tatemura,
Hidehiko Tanaka:
Debugger for a Parallel Logic Programming Language Fleng.
LP 1989: 87-96 |
| 25 | | Lu Xu,
Hanpei Koike,
Hidehiko Tanaka:
Distributed Garbage Collection for the Parallel Inference Engine PIE64.
NACLP 1989: 922-941 |
| 1988 |
|---|
| 24 | | Martin Nilsson,
Hidehiko Tanaka:
Massively Parallel Implementation of Flat GHC on the Connection Machine.
FGCS 1988: 1031-1040 |
| 23 | | Hanpei Koike,
Hidehiko Tanaka:
Multi-Context Processing and Data Balancing Mechanism of the Parallel Inference Machine PIE64.
FGCS 1988: 970-977 |
| 22 | | Martin Nilsson,
Hidehiko Tanaka:
A Flat GHC Implementation for Supercomputers.
ICLP/SLP 1988: 1337-1350 |
| 1987 |
|---|
| 21 | | Tadashi Ohmori,
Hidehiko Tanaka:
An Algebraic Deductive Database Managing a Mass of Rule Clauses.
IWDM 1987: 660-673 |
| 20 | | Toshiaki Tarui,
Tsutomu Maruyama,
Hidehiko Tanaka:
A Preliminary Evaluation of a Parallel Inference Machine for Stream Parallel Languages.
LP 1987: 132-147 |
| 19 | | Martin Nilsson,
Hidehiko Tanaka:
The Art of Building a Parallel Logic Programming System or From Zero to Full GHC in Ten Pages.
LP 1987: 95-104 |
| 1986 |
|---|
| 18 | | Martin Nilsson,
Hidehiko Tanaka:
Cyclic Tree Traversal.
ICLP 1986: 593-599 |
| 17 | | Masahiro Fujita,
Shinji Kono,
Hidehiko Tanaka,
Tohru Moto-Oka:
Tokio: Logic Programming Language Based on Temporal Logic and its Compilation to Prolog.
ICLP 1986: 695-709 |
| 16 | | Hanpei Koike,
Hidehiko Tanaka:
Fast Execution Mechanisms of Parallel Inference Engine PIE: PIEpelined Goal Rewriting and Goal Multicasting.
LP 1986: 159-169 |
| 15 | | Martin Nilsson,
Hidehiko Tanaka:
FLENG Prolog - The Language which turns Supercomputers into Parallel Prolog Machines.
LP 1986: 170-179 |
| 14 | EE | Shinya Fushimi,
Masaru Kitsuregawa,
Hidehiko Tanaka:
An Overview of The System Software of A Parallel Relational Database Machine GRACE.
VLDB 1986: 209-219 |
| 1985 |
|---|
| 13 | | Shinya Fushimi,
Masaru Kitsuregawa,
Hidehiko Tanaka,
Tohru Moto-Oka:
Multidimensional Clustering Techniques for Large Relational Database Machines.
FODO 1985: 293-308 |
| 12 | | Masaru Kitsuregawa,
Shinya Fushimi,
Hidehiko Tanaka,
Tohru Moto-Oka:
Memory Management Algorithms in Pipeline Merge Sorter.
IWDM 1985: 208-232 |
| 11 | | Shinji Kono,
T. Aoyagi,
Masahiro Fujita,
Hidehiko Tanaka:
Implementation of Temporal Logic Programming Language Tokio.
LP 1985: 138-147 |
| 10 | | Masahiro Fujita,
Makoto Ishisone,
Hiroshi Nakamura,
Hidehiko Tanaka,
Tohru Moto-Oka:
Using the Temporal Logic Programming Language Tokio for Algorithm Description and Automatic CMOS Gate Array Synthesis.
LP 1985: 246-255 |
| 9 | | Tsutomu Maruyama,
Keiji Hirata,
Hidehiko Tanaka,
Tohru Moto-Oka:
A Note on the Elementary Execution Unit in a Parallel Inference Machine.
LP 1985: 25-34 |
| 8 | EE | Shinya Fushimi,
Masaru Kitsuregawa,
Masaya Nakayama,
Hidehiko Tanaka,
Tohru Moto-Oka:
Algorithm and Performance Evaluation of Adaptive Multidimensional Clustering Technique.
SIGMOD Conference 1985: 308-318 |
| 1984 |
|---|
| 7 | | Tohru Moto-Oka,
Hidehiko Tanaka,
Hitoshi Aida,
Keiji Hirata,
Tsutomu Maruyama:
The Architecture of a Parallel Inference Engine - PIE.
FGCS 1984: 479-488 |
| 6 | | Masahiro Fujita,
Hidehiko Tanaka,
Tohru Moto-Oka:
Specifying Hardware in temporal Logic & Efficient Synthesis of State-Diagrams Using Prolog.
FGCS 1984: 572-581 |
| 5 | | Atsuhiro Goto,
Hidehiko Tanaka,
Tohru Moto-Oka:
Highly Parallel Inference Engine PIE: Goal Rewriting Model and Machine Architecture.
New Generation Comput. 2(1): 37-58 (1984) |
| 1983 |
|---|
| 4 | | Masaru Kitsuregawa,
Hidehiko Tanaka,
Tohru Moto-Oka:
Application of Hash to Data Base Machine and Its Architecture.
New Generation Comput. 1(1): 63-74 (1983) |
| 3 | | Hitoshi Aida,
Hidehiko Tanaka,
Tohru Moto-Oka:
A Prolog Extension for Handling Negative Knowledge.
New Generation Comput. 1(1): 87-91 (1983) |
| 2 | | Masahiro Fujita,
Hidehiko Tanaka,
Tohru Moto-Oka:
Temporal Logic Based Hardware Description and Its Verification with Prolog.
New Generation Comput. 1(2): 195-203 (1983) |
| 1982 |
|---|
| 1 | | Masaru Kitsuregawa,
Hidehiko Tanaka,
Tohru Moto-Oka:
Relational Algebra Machine GRACE.
RIMS Symposium on Software Science and Engineering 1982: 191-214 |
