| 2006 |
|---|
| 5 | | Yehuda Naveh,
Michal Rimon,
Itai Jaeger,
Yoav Katz,
Michael Vinov,
Eitan Marcus,
Gil Shurek:
Constraint-Based Random Stimuli Generation for Hardware Verification.
AAAI 2006 |
| 2003 |
|---|
| 4 | EE | Allon Adir,
Hagit Attiya,
Gil Shurek:
Information-Flow Models for Shared Memory with an Application to the PowerPC Architecture.
IEEE Trans. Parallel Distrib. Syst. 14(5): 502-515 (2003) |
| 2002 |
|---|
| 3 | EE | Eyal Bin,
Roy Emek,
Gil Shurek,
Avi Ziv:
Using a constraint satisfaction formulation and solution techniques for random test program generation.
IBM Systems Journal 41(3): 386-402 (2002) |
| 1995 |
|---|
| 2 | EE | Aharon Aharon,
Dave Goodman,
Moshe Levinger,
Yossi Lichtenstein,
Yossi Malka,
Charlotte Metzger,
Moshe Molcho,
Gil Shurek:
Test Program Generation for Functional Verification of PowerPC Processors in IBM.
DAC 1995: 279-285 |
| 1990 |
|---|
| 1 | | Gil Shurek,
Orna Grumberg:
The Modular Framework of Computer-Aided Verification.
CAV 1990: 214-223 |
