2007 | ||
---|---|---|
7 | EE | Christophe Layer, Daniel Schaupp, Hans-Jörg Pfleiderer: Area and Throughput Aware Comparator Networks Optimization for Parallel Data Processing on FPGA. ISCAS 2007: 405-408 |
2005 | ||
6 | EE | Christophe Layer, Hans-Jörg Pfleiderer: Efficient Hardware Search Engine for Associative Content Retrieval of Long Queries in Huge Multimedia Databases. ICME 2005: 1034-1037 |
5 | Christophe Layer, Hans-Jörg Pfleiderer: Vertical Sorting Techniques Accelerating Associative Accesses based Information Retrieval Systems. Parallel and Distributed Computing and Networks 2005: 411-416 | |
2004 | ||
4 | Christophe Layer, Hans-Jörg Pfleiderer: High Performance Associative Coprocessor Architecture for Advanced Database Searching. Databases and Applications 2004: 87-92 | |
3 | EE | Christophe Layer, Hans-Jörg Pfleiderer: A Reconfigurable Recurrent Bitonic Sorting Network for Concurrently Accessible Data. FPL 2004: 648-657 |
2 | Christophe Layer, Hans-Jörg Pfleiderer, Christoph Heer: A scalable compact architecture for the computation of integer binary logarithms through linear approximation. ISCAS (2) 2004: 421-424 | |
2003 | ||
1 | Christophe Layer: High Performance System Architecture of an Associative Computing Engine Optimised for Search Algorithms. VLSI-SOC 2003: 74- |
1 | Christoph Heer | [2] |
2 | Hans-Jörg Pfleiderer | [2] [3] [4] [5] [6] [7] |
3 | Daniel Schaupp | [7] |