| 2005 |
|---|
| 8 | EE | Naveed A. Sherwani,
Susan Lippincott Mack,
Alex Alexanian,
Premal Buch,
Carlo Guardiani,
Harold Lehon,
Peter Rabkin,
Atul Sharan:
DFM rules!
DAC 2005: 168-169 |
| 2002 |
|---|
| 7 | EE | Wei Chen,
Massoud Pedram,
Premal Buch:
Buffered Routing Tree Construction under Buffer Placement Blockages.
VLSI Design 2002: 381-386 |
| 1998 |
|---|
| 6 | EE | John Lillis,
Premal Buch:
Table-Lookup Methods for Improved Performance-Driven Routing.
DAC 1998: 368-373 |
| 1997 |
|---|
| 5 | EE | Premal Buch,
Amit Narayan,
A. Richard Newton,
Alberto L. Sangiovanni-Vincentelli:
Logic synthesis for large pass transistor circuits.
ICCAD 1997: 663-670 |
| 4 | EE | Premal Buch,
Christopher K. Lennard,
A. Richard Newton:
Engineering change for power optimization using global sensitivity and synthesis flexibility.
ISLPED 1997: 88-91 |
| 3 | EE | Premal Buch,
Ernest S. Kuh:
SYMPHONY: A Fast Mixed Signal Simulator for BiMOS Analog/Digital Circuits.
VLSI Design 1997: 403-407 |
| 1996 |
|---|
| 2 | EE | Christopher K. Lennard,
Premal Buch,
A. Richard Newton:
Logic synthesis using power-sensitive don't care sets.
ISLPED 1996: 293-296 |
| 1995 |
|---|
| 1 | EE | Premal Buch,
Shen Lin,
Vijay Nagasamy,
Ernest S. Kuh:
Techniques for fast circuit simulation applied to power estimation of CMOS circuits.
ISLPD 1995: 135-138 |
