| 2008 |
|---|
| 6 | EE | Muzhou Shao:
Fast Timing Update under the Effect of IR Drop.
ISQED 2008: 301-304 |
| 2005 |
|---|
| 5 | EE | Muzhou Shao,
Youxin Gao,
Li-Pen Yuan,
Hung-Ming Chen,
Martin D. F. Wong:
Current Calculation on VLSI Signal Interconnects.
ISQED 2005: 580-585 |
| 4 | EE | Muzhou Shao,
Youxin Gao,
Li-Pen Yuan,
Martin D. F. Wong:
IR Drop and Ground Bounce Awareness Timing Model.
ISVLSI 2005: 226-231 |
| 2004 |
|---|
| 3 | EE | Hung-Ming Chen,
I-Min Liu,
Martin D. F. Wong,
Muzhou Shao,
Li-Da Huang:
I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design.
ICCD 2004: 562-567 |
| 2003 |
|---|
| 2 | EE | Muzhou Shao,
Martin D. F. Wong,
Huijing Cao,
Youxin Gao,
Li-Pen Yuan,
Li-Da Huang,
Seokjin Lee:
Explicit gate delay model for timing evaluation.
ISPD 2003: 32-38 |
| 2002 |
|---|
| 1 | EE | Muzhou Shao,
D. F. Wong,
Youxin Gao,
Li-Pen Yuan,
Huijing Cao:
Shaping interconnect for uniform current density.
ICCAD 2002: 254-259 |
