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Seokjin Lee

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2003
6EESeokjin Lee, Hua Xiang, D. F. Wong, Richard Y. Sun: Wire type assignment for FPGA routing. FPGA 2003: 61-67
5EESeokjin Lee, Yongseok Cheon, Martin D. F. Wong: A Min-Cost Flow Based Detailed Router for FPGAs. ICCAD 2003: 388-393
4EEYongseok Cheon, Seokjin Lee, Martin D. F. Wong: Stable Multiway Circuit Partitioning for ECO. ICCAD 2003: 718-725
3EEMuzhou Shao, Martin D. F. Wong, Huijing Cao, Youxin Gao, Li-Pen Yuan, Li-Da Huang, Seokjin Lee: Explicit gate delay model for timing evaluation. ISPD 2003: 32-38
2EESeokjin Lee, Martin D. F. Wong: Timing-driven routing for FPGAs based on Lagrangian relaxation. IEEE Trans. on CAD of Integrated Circuits and Systems 22(4): 506-510 (2003)
2002
1EESeokjin Lee, D. F. Wong: Timing-driven routing for FPGAs based on Lagrangian relaxation. ISPD 2002: 176-181

Coauthor Index

1Huijing Cao [3]
2Yongseok Cheon [4] [5]
3Youxin Gao [3]
4Li-Da Huang [3]
5Muzhou Shao [3]
6Richard Y. Sun [6]
7Martin D. F. Wong (D. F. Wong) [1] [2] [3] [4] [5] [6]
8Hua Xiang [6]
9Li-Pen Yuan [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)