Joonseok Park

2009
16	EE	Jaeyoung Yi, Karam Park, Joonseok Park, Won W. Ro: Fully Pipelined Hardware Implementation of 128-Bit SEED Block Cipher Algorithm. ARC 2009: 181-192
2007
15	EE	Joonseok Park, Pedro C. Diniz: Partial Data Reuse for Windowing Computations: Performance Modeling for FPGA Implementations. ARC 2007: 97-109
2005
14	EE	Pedro C. Diniz, Mary W. Hall, Joonseok Park, Byoungro So, Heidi E. Ziegler: Automatic mapping of C to FPGAs with the DEFACTO compilation and synthesis system. Microprocessors and Microsystems 29(2-3): 51-62 (2005)
2004
13	EE	Nastaran Baradaran, Joonseok Park, Pedro C. Diniz: Data Reuse in Configurable Architectures with RAM Blocks: Extended Abstract. FPL 2004: 1113-1115
12	EE	Nastaran Baradaran, Pedro C. Diniz, Joonseok Park: Extending the Applicability of Scalar Replacement to Multiple Induction Variables. LCPC 2004: 455-469
11	EE	Joonseok Park, Pedro C. Diniz, K. R. Shesha Shayee: Performance and Area Modeling of Complete FPGA Designs in the Presence of Loop Transformations. IEEE Trans. Computers 53(11): 1420-1435 (2004)
2003
10	EE	Pedro C. Diniz, Joonseok Park: Data Search and Reorganization Using FPGAs: Application to Spatial Pointer-based Data Structures. FCCM 2003: 207-217
9	EE	K. R. Shesha Shayee, Joonseok Park, Pedro C. Diniz: Performance and Area Modeling of Complete FPGA Designs in the presence of Loop Transformations. FCCM 2003: 296
8	EE	Joonseok Park, Pedro C. Diniz: Synthesis and Estimation of Memory Interfaces for FPGA-based Reconfigurable Computing Engines. FCCM 2003: 297-299
7	EE	Pedro C. Diniz, Joonseok Park: Using FPGAs for data and reorganization engines: preliminary results for spatial pointer-based data structures. FPGA 2003: 242
6	EE	K. R. Shesha Shayee, Joonseok Park, Pedro C. Diniz: Performance and Area Modeling of Cmplete FPGA Designs in the Presence of Loop Transformations. FPL 2003: 313-323
2002
5	EE	Pedro C. Diniz, Joonseok Park: Data reorganization engines for the next generation of system-on-a-chip FPGAs. FPGA 2002: 237-244
2001
4	EE	Pablo Moisset, Pedro C. Diniz, Joonseok Park: Matching and searching analysis for parallel hardware implementation on FPGAs. FPGA 2001: 125-133
3		Joonseok Park, Pedro C. Diniz: Synthesis of pipelined memory access controllers for streamed data applications on FPGA-based computing engines. ISSS 2001: 221-226
2	EE	Pedro C. Diniz, Mary W. Hall, Joonseok Park, Byoungro So, Heidi E. Ziegler: Bridging the Gap between Compilation and Synthesis in the DEFACTO System. LCPC 2001: 52-70
2000
1	EE	Pedro C. Diniz, Joonseok Park: Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines. FCCM 2000: 91-100

Coauthor Index

1	Nastaran Baradaran	[12] [13]
2	Pedro C. Diniz	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
3	Mary W. Hall	[2] [14]
4	Pablo Moisset	[4]
5	Karam Park	[16]
6	Won W. Ro	[16]
7	K. R. Shesha Shayee	[6] [9] [11]
8	Byoungro So	[2] [14]
9	Jaeyoung Yi	[16]
10	Heidi E. Ziegler	[2] [14]

Colors in the list of coauthors