| 2002 |
|---|
| 6 | EE | Liqiong Wei,
Rongtian Zhang,
Kaushik Roy,
Zhanping Chen,
David B. Janes:
Vertically integrated SOI circuits for low-power and high-performance applications.
IEEE Trans. VLSI Syst. 10(3): 351-362 (2002) |
| 2001 |
|---|
| 5 | EE | Rongtian Zhang,
Kaushik Roy,
Cheng-Kok Koh,
David B. Janes:
Exploring SOI Device Structures and Interconnect Architectures for 3-Dimensional Integration.
DAC 2001: 846-851 |
| 4 | EE | Rongtian Zhang,
Kaushik Roy,
Cheng-Kok Koh,
David B. Janes:
Power trends and performance characterization of 3-dimensional integration.
ISCAS (4) 2001: 414-417 |
| 3 | EE | Rongtian Zhang,
Kaushik Roy,
David B. Janes:
Double-gate fully-depleted SOI transistors for low-power high-performance nano-scale circuit design.
ISLPED 2001: 213-218 |
| 2 | EE | Rongtian Zhang,
Kaushik Roy,
Cheng-Kok Koh,
David B. Janes:
Power Trends and Performance Characterization of 3-Dimensional Integration for Future Technology Generations.
ISQED 2001: 217-222 |
| 2000 |
|---|
| 1 | | Rongtian Zhang,
Kaushik Roy,
Cheng-Kok Koh,
David B. Janes:
Stochastic Wire-Length and Delay Distribution of 3-Dimensional Circuits.
ICCAD 2000: 208-213 |
