2007 |
9 | EE | Oscar Pérez,
Yves Berviller,
Camel Tanougast,
Serge Weber:
The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation.
J. UCS 13(3): 349-362 (2007) |
2005 |
8 | | Michael Janiaut,
Camel Tanougast,
Hassan Rabah,
Yves Berviller,
Christian Mannino,
Serge Weber:
Configurable hardware implementation of a conceptual decoder for a real-time MPEG-2 analysis.
FPL 2005: 386-390 |
2004 |
7 | | Christian Mannino,
Hassan Rabah,
Camel Tanougast,
Yves Berviller,
Michael Janiaut,
Serge Weber:
FPGA Implementation of a Novel Architecture for PCR Related Measurements In DVB-T.
ESA/VLSI 2004: 606-610 |
6 | EE | Christian Mannino,
Hassan Rabah,
Camel Tanougast,
Yves Berviller,
Michael Janiaut,
Serge Weber:
FPGA Implementation of a Novel All Digital PLL Architecture for PCR Related Measurements in DVB-T.
FPL 2004: 1027-1031 |
5 | EE | Camel Tanougast,
Yves Berviller,
Christian Mannino,
Hassan Rabah,
Michael Janiaut,
Serge Weber:
SystemC Model of a MPEG-2 DVB-T Bit-Rate Measurement Architecture for FPGA Implementation.
IEEE International Workshop on Rapid System Prototyping 2004: 157-163 |
2003 |
4 | EE | Camel Tanougast,
Yves Berviller,
Philippe Brunet,
Serge Weber:
Automated RTR Temporal Partitioning for Reconfigurable Embedded Real-Time System Design.
IPDPS 2003: 178 |
3 | EE | Philippe Brunet,
Camel Tanougast,
Yves Berviller,
Serge Weber:
Hardware Partitioning Software for Dynamically Reconfigurable SoC Design.
IWSOC 2003: 106-111 |
2 | EE | Camel Tanougast,
Yves Berviller,
Philippe Brunet,
Serge Weber,
Hassan Rabah:
Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system.
Microprocessors and Microsystems 27(3): 115-130 (2003) |
2000 |
1 | EE | Camel Tanougast,
Yves Berviller,
Serge Weber:
Optimization of Motion Estimator for Run-Time-Reconfiguration Implementation.
IPDPS Workshops 2000: 959-965 |