2006 |
22 | EE | Tarak Gandhi,
Mau-Tsuen Yang,
Rangachar Kasturi,
Octavia I. Camps,
Lee D. Coraor,
Jeffrey McCandless:
Performance characterization of the dynamic programming obstacle detection algorithm.
IEEE Transactions on Image Processing 15(5): 1202-1214 (2006) |
2002 |
21 | EE | Mau-Tsuen Yang,
Tarak Gandhi,
Rangachar Kasturi,
Lee D. Coraor,
Octavia I. Camps,
Jeffrey McCandless:
Real-Time Implementation of Obstacle Detection Algorithms on a Datacube MaxPCI Architecture.
Real-Time Imaging 8(2): 157-172 (2002) |
2000 |
20 | EE | Marc Bumble,
Lee D. Coraor,
Lily Elefteriadou:
Exploring CORSIM Runtime Characteristics: Profiling a Traffic Simulator.
Annual Simulation Symposium 2000: 139- |
19 | EE | Tarak Gandhi,
Mau-Tsuen Yang,
Rangachar Kasturi,
Octavia I. Camps,
Lee D. Coraor,
Jeffrey McCandless:
Detection of Obstacles in the Flight Path of an Aircraft.
CVPR 2000: 2304-2311 |
1999 |
18 | EE | David L. Landis,
Paul T. Hulina,
Scott Deno,
Luke Roth,
Lee D. Coraor:
Evaluation of Computing in Memory Architectures for Digital Image Processing Applications.
ICCD 1999: 146-151 |
17 | EE | David L. Landis,
Praveen Guddeti,
Paul T. Hulina,
Lee D. Coraor:
Language-Based Rapid Prototyping Methods for Legacy System Re-Engineering and Re-Use.
IEEE International Workshop on Rapid System Prototyping 1999: 52- |
16 | EE | Luke Roth,
Lee D. Coraor,
David L. Landis,
Paul T. Hulina,
Scott Deno:
Computing in Memory Architectures for Digital Image Processing.
MTDT 1999: 8-15 |
15 | EE | Marc Bumble,
Lee D. Coraor:
A global synchronization network for a non-deterministic simulation architecture.
Winter Simulation Conference 1999: 1460-1469 |
1998 |
14 | | Marc Bumble,
Lee D. Coraor:
Implementing Parallelism in Random Discrete Event-Driven Simulation.
IPPS/SPDP Workshops 1998: 418-427 |
13 | EE | Marc Bumble,
Lee D. Coraor:
Architecture for a Non-deterministic Simulation Machine.
Winter Simulation Conference 1998: 1599-1606 |
1995 |
12 | EE | Lizy Kurian John,
Vinod Reddy,
Paul T. Hulina,
Lee D. Coraor:
A comparative evaluation of software techniques to hide memory latency.
HICSS (1) 1995: 229 |
11 | | Lizy Kurian John,
Vinod Reddy,
Paul T. Hulina,
Lee D. Coraor:
Program Balance and Its Impact on High Performance RISC Architectures.
HPCA 1995: 370-379 |
1994 |
10 | | Ali Berrached,
Paul T. Hulina,
Lee D. Coraor:
Structured Data Access Mechanisms for a Decoupled Computer Architecture.
ICPP 1994: 285-289 |
9 | | Lizy Kurian John,
Bermjae Choi,
Paul T. Hulina,
Lee D. Coraor:
Module Partitioning and Interlaced Data Placement Schemes to Reduce Conflicts in Interleaved Memories.
ICPP (1) 1994: 212-219 |
8 | | Lizy Kurian John,
Paul T. Hulina,
Lee D. Coraor:
Memory Latency Effects in Decoupled Architectures.
IEEE Trans. Computers 43(10): 1129-1139 (1994) |
1992 |
7 | | Lizy Kurian John,
Paul T. Hulina,
Lee D. Coraor:
Memory Latency Effects in Decoupled Architectures With a Single Data Memory Module.
ISCA 1992: 236-245 |
1991 |
6 | | Paul T. Hulina,
Lee D. Coraor,
Shih-Wei Sun:
Performance Analysis of an Address Generation Coprocessor.
ICPP (1) 1991: 136-143 |
5 | EE | Lizy Kurian John,
Paul T. Hulina,
Lee D. Coraor,
Dhamir N. Mannai:
Classification and Performance Evaluation of Instruction Buffering Techniques.
ISCA 1991: 150-159 |
1990 |
4 | | Paul T. Hulina,
Lee D. Coraor:
Coprocessor architectures for efficient address computation and memory accessing.
Comput. Syst. Sci. Eng. 5(3): 137-146 (1990) |
1987 |
3 | | Paul T. Hulina,
Lee D. Coraor:
A Hardware Memory Mapping Unit for Efficient Address Computation.
ICPP 1987: 340-343 |
2 | | Lee D. Coraor,
Paul T. Hulina,
Orlando A. Morean:
A General Model for Memory-Based Finite-State Machines.
IEEE Trans. Computers 36(2): 175-184 (1987) |
1985 |
1 | | Lee D. Coraor,
Paul T. Hulina:
A Reconfigurable Multiprocessor.
ICPP 1985: 649-651 |