| 2008 |
|---|
| 6 | EE | Maik Boden,
Thomas Fiebig,
Markus Reiband,
Peter Reichel,
Steffen Rülke:
GePaRD - A High-Level Generation Flow for Partially Reconfigurable Designs.
ISVLSI 2008: 298-303 |
| 2007 |
|---|
| 5 | EE | Maik Boden,
Thomas Fiebig,
Torsten Meibner,
Steffen Rülke,
Jürgen Becker:
High-Level Synthesis of HW Tasks Targeting Run-Time Reconfigurable FPGAs.
IPDPS 2007: 1-8 |
| 2006 |
|---|
| 4 | EE | Maik Boden,
Steffen Rülke,
Jürgen Becker:
A high-level target-precise model for designing reconfigurable HW tasks.
IPDPS 2006 |
| 2005 |
|---|
| 3 | EE | Maik Boden,
Alex Gleich,
Steffen Rülke,
Ulrich Nageldinger:
A Low-Cost Realization of an Adaptable Protocol Processing Unit.
IPDPS 2005 |
| 2004 |
|---|
| 2 | EE | Maik Boden,
Manfred Koegst,
José Luis Tiburcio Badía,
Steffen Rülke:
Cost-Efficient Implementation of Adaptive Finite State Machines.
DSD 2004: 144-151 |
| 2002 |
|---|
| 1 | EE | Maik Boden,
Jörg Schneider,
Klaus Feske,
Steffen Rülke:
Enhanced Reusability for SoC-Based HW/SW Co-Design.
DSD 2002: 94-101 |
