2008 |
13 | EE | Cristiano Pereira,
Harish Patil,
Brad Calder:
Reproducible simulation of multi-threaded workloads for architecture design exploration.
IISWC 2008: 173-182 |
2007 |
12 | EE | Erez Perelman,
Jeremy Lau,
Harish Patil,
Aamer Jaleel,
Greg Hamerly,
Brad Calder:
Cross Binary Simulation Points.
ISPASS 2007: 179-189 |
2006 |
11 | EE | Satish Narayanasamy,
Cristiano Pereira,
Harish Patil,
Robert Cohn,
Brad Calder:
Automatic logging of operating system effects to guide application-level architecture simulation.
SIGMETRICS/Performance 2006: 216-227 |
2005 |
10 | EE | Chi-Keung Luk,
Robert S. Cohn,
Robert Muth,
Harish Patil,
Artur Klauser,
P. Geoffrey Lowney,
Steven Wallace,
Vijay Janapa Reddi,
Kim M. Hazelwood:
Pin: building customized program analysis tools with dynamic instrumentation.
PLDI 2005: 190-200 |
2004 |
9 | EE | Chi-Keung Luk,
Robert Muth,
Harish Patil,
Robert S. Cohn,
P. Geoffrey Lowney:
Ispike: A Post-link Optimizer for the Intel®Itanium®Architecture.
CGO 2004: 15-26 |
8 | EE | Harish Patil,
Robert S. Cohn,
Mark Charney,
Rajiv Kapoor,
Andrew Sun,
Anand Karunanidhi:
Pinpointing Representative Portions of Large Intel® Itanium® Programs with Dynamic Instrumentation.
MICRO 2004: 81-92 |
2002 |
7 | EE | Chi-Keung Luk,
Robert Muth,
Harish Patil,
Richard Weiss,
P. Geoffrey Lowney,
Robert S. Cohn:
Profile-guided post-link stride prefetching.
ICS 2002: 167-178 |
6 | EE | Joel S. Emer,
Pritpal Ahuja,
Eric Borch,
Artur Klauser,
Chi-Keung Luk,
Srilatha Manne,
Shubhendu S. Mukherjee,
Harish Patil,
Steven Wallace,
Nathan L. Binkert,
Roger Espasa,
Toni Juan:
Asim: A Performance Model Framework.
IEEE Computer 35(2): 68-76 (2002) |
2000 |
5 | EE | Harish Patil,
Joel S. Emer:
Combining Static and Dynamic Branch Prediction to Reduce Destructive Aliasing.
HPCA 2000: 251- |
1999 |
4 | EE | Le-Chun Wu,
Rajiv Mirani,
Harish Patil,
Bruce Olsen,
Wen-mei W. Hwu:
A New Framework for Debugging Globally Optimized Code.
PLDI 1999: 181-191 |
1997 |
3 | | Harish Patil,
Charles N. Fischer:
Low-Cost, Concurrent Checking of Pointer and Array Accesses in C Programs.
Softw., Pract. Exper. 27(1): 87-110 (1997) |
1995 |
2 | | Harish Patil,
Charles N. Fischer:
Efficient Run-time Monitoring Using Shadow Processing.
AADEBUG 1995: 119-132 |
1993 |
1 | EE | Dhananjay M. Dhamdhere,
Harish Patil:
An Elimination Algorithm for Bidirectional Data Flow Problems Using Edge Placement.
ACM Trans. Program. Lang. Syst. 15(2): 312-336 (1993) |