| 2007 |
|---|
| 8 | EE | William H. Kao,
Xiaopeng Dong:
Digital Block Modeling and Substrate Noise Aware Floorplanning for Mixed Signal SOCs.
ISCAS 2007: 1935-1938 |
| 2003 |
|---|
| 7 | EE | William H. Kao,
Wenkung K. Chu:
Noise constraint driven placement for mixed signal designs.
ISCAS (4) 2003: 712-715 |
| 2001 |
|---|
| 6 | EE | Wenting Hou,
Hong Yu,
Xianlong Hong,
Yici Cai,
Weimin Wu,
Jun Gu,
William H. Kao:
A new congestion-driven placement algorithm based on cell inflation.
ASP-DAC 2001: 605-608 |
| 1999 |
|---|
| 5 | EE | Junwei Hou,
William H. Kao,
Abhijit Chatterjee:
A novel concurrent fault simulation method for mixed-signal circuits.
ISCAS (2) 1999: 448-451 |
| 1998 |
|---|
| 4 | EE | Bogdan G. Arsintescu,
Edoardo Charbon,
Enrico Malavasi,
Umakanta Choudhury,
William H. Kao:
General AC Constraint Transformation for Analog ICs.
DAC 1998: 38-43 |
| 1997 |
|---|
| 3 | | Ramakrishna Voorakaranam,
Sudip Chakrabarti,
Junwei Hou,
Alfred V. Gomes,
Sasikumar Cherubal,
Abhijit Chatterjee,
William H. Kao:
Hierarchical Specification-Driven Analog Fault Modeling for Efficient Fault Simulation and Diagnosis.
ITC 1997: 903-912 |
| 1992 |
|---|
| 2 | | Stephen C. Bateman,
William H. Kao:
Simulation of an Integrated Design and Test Environment for Mixed-Signal Integrated Circuits.
ITC 1992: 405-414 |
| 1985 |
|---|
| 1 | EE | William H. Kao,
Nader Fathi,
Chia-Hao Lee:
Algorithms for automatic transistor sizing in CMOS digital circuits.
DAC 1985: 781-784 |
