Mehdi Sedighi

2008
15	EE	Mehdi Saeedi, Morteza Saheb Zamani, Mehdi Sedighi: Moving forward: A non-search based synthesis method toward efficient CNOT-based quantum circuit synthesis algorithms. ASP-DAC 2008: 83-88
14	EE	Mahdi Aminian, Mehdi Saeedi, Morteza Saheb Zamani, Mehdi Sedighi: FPGA-Based Circuit Model Emulation of Quantum Algorithms. ISVLSI 2008: 399-404
2007
13	EE	Mehdi Saeedi, Morteza Saheb Zamani, Mehdi Sedighi: Algebraic Characterization of CNOT-Based Quantum Circuits with its Applications on Logic Synthesis. DSD 2007: 339-346
12	EE	Mehdi Saeedi, Mehdi Sedighi, Morteza Saheb Zamani: A novel synthesis algorithm for reversible circuits. ICCAD 2007: 65-68
11	EE	Mehdi Saeedi, Morteza Saheb Zamani, Mehdi Sedighi: On the Behavior of Substitution-based Reversible Circuit Synthesis Algorithms: Investigation and Improvement. ISVLSI 2007: 428-436
2006
10	EE	Farhad Mehdipour, Hamid Noori, Morteza Saheb Zamani, Kazuaki Murakami, Mehdi Sedighi, Koji Inoue: An Integrated Temporal Partitioning and Mapping Framework for Handling Custom Instructions on a Reconfigurable Functional Unit. Asia-Pacific Computer Systems Architecture Conference 2006: 219-230
9		Farhad Mehdipour, Morteza Saheb Zamani, Mehdi Sedighi, Kazuaki Murakami, Hamid Noori: GifT: A Gravity-Directed and Life-Time Based Algorithm for Temporal Partitioning of Data Flow Graphs. ERSA 2006: 227-230
8	EE	Farhad Mehdipour, Hamid Noori, Morteza Saheb Zamani, Kazuaki Murakami, Koji Inoue, Mehdi Sedighi: Custom Instruction Generation Using Temporal Partitioning Techniques for a Reconfigurable Functional Unit. EUC 2006: 722-731
7	EE	Farhad Mehdipour, Morteza Saheb Zamani, H. R. Ahmadifar, Mehdi Sedighi, Kazuaki Murakami: Reducing reconfiguration time of reconfigurable computing systems in integrated temporal partitioning and physical design framework. IPDPS 2006
6	EE	Farhad Mehdipour, Morteza Saheb Zamani, Mehdi Sedighi: An integrated temporal partitioning and physical design framework for static compilation of reconfigurable computing systems. Microprocessors and Microsystems 30(1): 52-62 (2006)
2005
5	EE	Kamran Saleh, Mehrdad Najibi, Mohsen Naderi, Hossein Pedram, Mehdi Sedighi: A novel clock generation scheme for globally asynchronous locally synchronous systems: an FPGA-validated approach. ACM Great Lakes Symposium on VLSI 2005: 296-301
4	EE	Hamid Safizadeh, Hamid Noori, Mehdi Sedighi, Ali Jahanian, Neda Zolfaghari: Efficient Host-Independent Coprocessor Architecture for Speech Coding Algorithms. DSD 2005: 227-230
3	EE	Farhad Mehdipour, Morteza Saheb Zamani, Mehdi Sedighi: Reducing Inter-Configuration Memory Usage and Performance Improvement in Reconfigurable Computing Systems. DSD 2005: 372-378
2	EE	Mehrdad Najibi, Kamran Saleh, Mohsen Naderi, Hossein Pedram, Mehdi Sedighi: Prototyping globally asynchronous locally synchronous circuits on commercial synchronous FPGAs (abstract only). FPGA 2005: 269
1	EE	Mehrdad Najibi, Kamran Saleh, Mohsen Naderi, Hossein Pedram, Mehdi Sedighi: Prototyping Globally Asynchronous Locally Synchronous Circuits on Commercial Synchronous FPGAs. IEEE International Workshop on Rapid System Prototyping 2005: 63-69

Coauthor Index

1	H. R. Ahmadifar	[7]
2	Mahdi Aminian	[14]
3	Koji Inoue	[8] [10]
4	Ali Jahanian	[4]
5	Farhad Mehdipour	[3] [6] [7] [8] [9] [10]
6	Kazuaki Murakami	[7] [8] [9] [10]
7	Mohsen Naderi	[1] [2] [5]
8	Mehrdad Najibi	[1] [2] [5]
9	Hamid Noori	[4] [8] [9] [10]
10	Hossein Pedram	[1] [2] [5]
11	Mehdi Saeedi	[11] [12] [13] [14] [15]
12	Hamid Safizadeh	[4]
13	Kamran Saleh	[1] [2] [5]
14	Morteza Saheb Zamani	[3] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
15	Neda Zolfaghari	[4]