| 2008 |
|---|
| 11 | EE | Mehdi Saeedi,
Morteza Saheb Zamani,
Mehdi Sedighi:
Moving forward: A non-search based synthesis method toward efficient CNOT-based quantum circuit synthesis algorithms.
ASP-DAC 2008: 83-88 |
| 10 | EE | Mahdi Aminian,
Mehdi Saeedi,
Morteza Saheb Zamani,
Mehdi Sedighi:
FPGA-Based Circuit Model Emulation of Quantum Algorithms.
ISVLSI 2008: 399-404 |
| 9 | EE | Minoo Mirsaeedi,
Morteza Saheb Zamani,
Mehdi Saeedi:
Simultaneous Gate Sizing and Skew Scheduling to Statistical Yield Improvement.
ISVLSI 2008: 467-470 |
| 8 | EE | Yasaman Sanaee,
Mehdi Saeedi,
Morteza Saheb Zamani:
Shared-PPRM: A Memory-Efficient Representation for Boolean Reversible Functions.
ISVLSI 2008: 471-474 |
| 7 | EE | Hamid Fadishei,
Mehdi Saeedi,
Morteza Saheb Zamani:
A fast IP routing lookup architecture for multi-gigabit switching routers based on reconfigurable systems.
Microprocessors and Microsystems - Embedded Hardware Design 32(4): 223-233 (2008) |
| 2007 |
|---|
| 6 | EE | Mehdi Saeedi,
Morteza Saheb Zamani,
Mehdi Sedighi:
Algebraic Characterization of CNOT-Based Quantum Circuits with its Applications on Logic Synthesis.
DSD 2007: 339-346 |
| 5 | EE | Mehdi Saeedi,
Mehdi Sedighi,
Morteza Saheb Zamani:
A novel synthesis algorithm for reversible circuits.
ICCAD 2007: 65-68 |
| 4 | EE | Hamid Reza Kheirabadi,
Morteza Saheb Zamani,
Mehdi Saeedi:
An Efficient Analytical Approach to Path-Based Buffer Insertion.
ISVLSI 2007: 219-224 |
| 3 | EE | Mehdi Saeedi,
Morteza Saheb Zamani,
Mehdi Sedighi:
On the Behavior of Substitution-based Reversible Circuit Synthesis Algorithms: Investigation and Improvement.
ISVLSI 2007: 428-436 |
| 2 | EE | Mehdi Saeedi,
Morteza Saheb Zamani,
Ali Jahanian:
Evaluation, prediction and reduction of routing congestion.
Microelectronics Journal 38(8-9): 942-958 (2007) |
| 2006 |
|---|
| 1 | EE | Mehdi Saeedi,
Morteza Saheb Zamani,
Ali Jahanian:
Prediction and reduction of routing congestion.
ISPD 2006: 72-77 |
