2006 |
8 | EE | Girish N. Patel,
Michael S. Reid,
David E. Schimmel,
Stephen P. DeWeerth:
An asynchronous architecture for modeling intersegmental neural communication.
IEEE Trans. VLSI Syst. 14(2): 97-110 (2006) |
2003 |
7 | EE | Vladimir E. Bondarenko,
Gennady S. Cymbalyuk,
Girish N. Patel,
Stephen P. DeWeerth,
Ronald L. Calabrese:
A bifurcation of a synchronous oscillations into a torus in a system of two mutually inhibitory aVLSI neurons: experimental observation.
Neurocomputing 52-54: 691-698 (2003) |
2000 |
6 | | Gennady S. Cymbalyuk,
Girish N. Patel,
Ronald L. Calabrese,
Stephen P. DeWeerth,
Avis H. Cohen:
Modeling Alternation to Synchrony with Inhibitory Coupling: A Neuromorphic VLSI Approach.
Neural Computation 12(10): 2259-2278 (2000) |
1999 |
5 | EE | Girish N. Patel,
Edgar A. Brown,
Stephen P. DeWeerth:
A Neuromorphic VLSI System for Modeling the Neural Control of Axial Locomotion.
NIPS 1999: 724-730 |
4 | EE | Girish N. Patel,
Gennady S. Cymbalyuk,
Ronald L. Calabrese,
Stephen P. DeWeerth:
Bifurcation Analysis of a Silicon Neuron.
NIPS 1999: 731-737 |
1997 |
3 | EE | Stephen P. DeWeerth,
Girish N. Patel,
Mario F. Simoni,
David E. Schimmel,
Ronald L. Calabrese:
A VLSI Architecture for Modeling Intersegmental Coordination.
ARVLSI 1997: 182-200 |
2 | | Girish N. Patel,
Jeremy H. Holleman,
Stephen P. DeWeerth:
Analog VLSI Model of Intersegmental Coordination with Nearest-Neighbor Coupling.
NIPS 1997 |
1995 |
1 | | Girish N. Patel,
Stephen P. DeWeerth:
An Analog VLSI Loser-Take-All Circuit.
ISCAS 1995: 850-853 |