| 2005 |
|---|
| 7 | EE | Masayuki Masuda,
Kazuhito Ito:
Rapid and precise instruction set evaluation for application specific processor design.
ISCAS (6) 2005: 6210-6213 |
| 2001 |
|---|
| 6 | | Tsuyoshi Isshiki,
Chawalit Honsawek,
Trio Adiono,
Kazuhito Ito,
Tomohiko Ohtsuka,
Dongju Li,
Hiroaki Kunieda:
H.263+ Video Encoder/Decoder LSI Featuring System-MSPA Architecture and Improved Rate Control Method.
ISAS-SCI (1) 2001: 195-200 |
| 2000 |
|---|
| 5 | EE | Kazuhito Ito:
A scheduling and allocation method to reduce data transfer time by dynamic reconfiguration.
ASP-DAC 2000: 323-328 |
| 1997 |
|---|
| 4 | EE | Kazuhito Ito,
Keshab K. Parhi:
A Generalized Technique for Register Counting and its Application to Cost-Optimal DSP Architecture Synthesis.
VLSI Signal Processing 16(1): 57-72 (1997) |
| 1995 |
|---|
| 3 | EE | Hiroaki Kunieda,
Yusong Liao,
Dongju Li,
Kazuhito Ito:
Automatic design for bit-serial MSPA architecture.
ASP-DAC 1995 |
| 2 | EE | Kazuhito Ito,
Keshab K. Parhi:
Determining the minimum iteration period of an algorithm.
VLSI Signal Processing 11(3): 229-244 (1995) |
| 1994 |
|---|
| 1 | EE | Kazuhito Ito,
Lori E. Lucke,
Keshab K. Parhi:
Module selection and data format conversion for cost-optimal DSP synthesis.
ICCAD 1994: 322-329 |
