dblp.uni-trier.dewww.uni-trier.de

Paul D. Franzon

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo
Home Page

2008
23EEPaul D. Franzon, W. Rhett Davis, Michael Steer, Steve Lipa, Eun Chu Oh, Thor Thorolfsson, Samson Melamed, Sonali Luniya, Tad Doxsee, Stephen Berkeley, Ben Shani, Kurt Obermiller: Design and CAD for 3D integrated circuits. DAC 2008: 668-673
2007
22EEMeeta Yadav, Ashwini Venkatachaliah, Paul D. Franzon: Hardware Architecture of a Parallel Pattern Matching Engine. ISCAS 2007: 1369-1372
21EELiang Zhang, J. M. Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon: Voltage-Mode Driver Preemphasis Technique For On-Chip Global Buses. IEEE Trans. VLSI Syst. 15(2): 231-236 (2007)
2005
20EELiang Zhang, John Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon: Driver pre-emphasis techniques for on-chip global buses. ISLPED 2005: 186-191
19EENuman Sadi Dogan, Paul D. Franzon, Wentai Liu: Impact of an SoC Research Project on Microelectronics Education: A Case Study. MSE 2005: 33-34
18EEW. Rhett Davis, John Wilson, Stephen Mick, Jian Xu, Hao Hua, Christopher Mineo, Ambarish M. Sule, Michael Steer, Paul D. Franzon: Demystifying 3D ICs: The Pros and Cons of Going Vertical. IEEE Design & Test of Computers 22(6): 498-510 (2005)
17EEMonther Aldwairi, Thomas M. Conte, Paul D. Franzon: Configurable string matching hardware for speeding up intrusion detection. SIGARCH Computer Architecture News 33(1): 99-107 (2005)
2004
16EELiang Zhang, Wentai Liu, Rizwan Bashirullah, John Wilson, Paul D. Franzon: Simplified delay design guidelines for on-chip global interconnects. ACM Great Lakes Symposium on VLSI 2004: 29-32
15EEJ. A. Palmer, James F. Mulling, Brian Dessent, Edward Grant, Jeffrey W. Eischen, Alexei Gruverman, A. I. Kingon, Paul D. Franzon: The Design, Fabrication, and Characterization of Millimeter Scale Motors for Miniature Direct Drive Robots. ICRA 2004: 4668-4673
2001
14EEAndreas Kuehlmann, Robert W. Dutton, Paul D. Franzon, Seth Copen Goldstein, Philip Luekes, Eric Parker, Thomas N. Theis: Will Nanotechnology Change the Way We Design and Verify Systems? (Panel). ICCAD 2001: 174
1999
13EEB. E. Duewer, J. M. Wilson, D. A. Winick, Paul D. Franzon: MEMS-Based Capacitor Arrays for Programmable Interconnect and RF Applications. ARVLSI 1999: 369-377
12EEPaul D. Franzon, Mark Basel, Aki Fujimara, Sharad Mehrotra, Ron Preston, Robin C. Sarma, Marty Walker: Parasitic Extraction Accuracy - How Much is Enough? DAC 1999: 429
11EEMouna Nakkar, David G. Bentlage, John Harding, David Schwartz, Paul D. Franzon, Thomas M. Conte: Dynamically Programmable Cache Evaluation and Virtualization. FPGA 1999: 246
10EEToby Schaffer, Andy Stanaski, Alan Glaser, Paul D. Franzon: The NCSU Cadence Design Kit for IC Fabrication through MOSIS. MSE 1999: 88-89
1997
9EEMir Azam, Paul D. Franzon, Wentai Liu: Low power data processing by elimination of redundant computations. ISLPED 1997: 259-264
8EEHong-Yean Hsieh, Wentai Liu, Paul D. Franzon, Ralph K. Cavin III: Clocking Optimization and Distribution in Digital Systems with Scheduled Skews. VLSI Signal Processing 16(2-3): 131-147 (1997)
1995
7EESharad Mehrotra, Paul D. Franzon, Michael Steer: Performance Driven Global Routing and Wiring Rule Generation for High Speed PCBs and MCMs. DAC 1995: 381-387
1994
6EESharad Mehrotra, Paul D. Franzon, Wentai Liu: Stochastic Optimization Approach to Transistor Sizing for CMOS VLSI Circuits. DAC 1994: 36-40
1993
5 Todd A. Cook, Paul D. Franzon, Edwin A. Harcourt, Thomas K. Miller III: System-Level Specification of Instruction Sets. ICCD 1993: 552-557
4 Paul D. Franzon, Robert J. Evans: A Multichip Module Design Process for Notebook Computers. IEEE Computer 26(4): 41-49 (1993)
1992
3EEAjay Dholakia, T. M. Lee, Donald L. Bitzer, Mladen A. Vouk, L. Wang, Paul D. Franzon: An efficient table-driven decoder for one-half rate convolutional codes. ACM Southeast Regional Conference 1992: 116-123
2EEPaul D. Franzon, Slobodan Simovich, Michael Steer, Mark Basel, Sharad Mehrotra, Tom Mills: Tools to Aid in Wiring Rule Generation for High Speed Interconnects. DAC 1992: 466-471
1990
1EED. Bout, Paul D. Franzon, J. Paulos, T. Miller, W. Snyder, T. Nagle, Wentai Liu: Scalable VLSI implementations for neural networks. VLSI Signal Processing 1(4): 367-385 (1990)

Coauthor Index

1Monther Aldwairi [17]
2Mir Azam [9]
3Mark Basel [2] [12]
4Rizwan Bashirullah [16] [20] [21]
5David G. Bentlage [11]
6Stephen Berkeley [23]
7Donald L. Bitzer [3]
8D. Bout [1]
9Ralph K. Cavin III [8]
10Thomas M. Conte [11] [17]
11Todd A. Cook [5]
12W. Rhett Davis [18] [23]
13Brian Dessent [15]
14Ajay Dholakia [3]
15Numan Sadi Dogan [19]
16Tad Doxsee [23]
17B. E. Duewer [13]
18Robert W. Dutton [14]
19Jeffrey W. Eischen [15]
20Robert J. Evans [4]
21Aki Fujimara [12]
22Alan Glaser [10]
23Seth Copen Goldstein [14]
24Edward Grant [15]
25Alexei Gruverman [15]
26Edwin A. Harcourt [5]
27John Harding [11]
28Hong-Yean Hsieh [8]
29Hao Hua [18]
30A. I. Kingon [15]
31Andreas Kuehlmann [14]
32T. M. Lee [3]
33Steve Lipa [23]
34Wentai Liu [1] [6] [8] [9] [16] [19]
35Philip Luekes [14]
36Sonali Luniya [23]
37Lei Luo [20] [21]
38Sharad Mehrotra [2] [6] [7] [12]
39Samson Melamed [23]
40Stephen Mick [18]
41T. Miller [1]
42Thomas K. Miller III [5]
43Tom Mills [2]
44Christopher Mineo [18]
45James F. Mulling [15]
46T. Nagle [1]
47Mouna Nakkar [11]
48Kurt Obermiller [23]
49Eun Chu Oh [23]
50J. A. Palmer [15]
51Eric Parker [14]
52J. Paulos [1]
53Ron Preston [12]
54Robin C. Sarma [12]
55Toby Schaffer [10]
56David Schwartz [11]
57Ben Shani [23]
58Slobodan Simovich [2]
59W. Snyder [1]
60Andy Stanaski [10]
61Michael Steer [2] [7] [18] [23]
62Ambarish M. Sule [18]
63Thomas N. Theis [14]
64Thor Thorolfsson [23]
65Ashwini Venkatachaliah [22]
66Mladen A. Vouk [3]
67Marty Walker [12]
68L. Wang [3]
69J. M. Wilson [13] [21]
70John Wilson [16] [18] [20]
71D. A. Winick [13]
72Jian Xu [18] [20] [21]
73Meeta Yadav [22]
74Liang Zhang [16] [20] [21]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)