Wei-Yu Chen

2007
15	EE	Cheng Wang, Wei-Yu Chen, Youfeng Wu, Bratin Saha, Ali-Reza Adl-Tabatabai: Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language. CGO 2007: 34-48
14	EE	Ting Wei Chiang, C. Y. Roger Chen, Wei-Yu Chen: A technique for selecting CMOS transistor orders. ICCD 2007: 438-443
13	EE	Ting Wei Chiang, C. Y. Roger Chen, Wei-Yu Chen: An efficient gate delay model for VLSI design. ICCD 2007: 450-455
12	EE	Wei-Yu Chen, Dan Bonachea, Costin Iancu, Katherine A. Yelick: Automatic nonblocking communication for partitioned global address space programs. ICS 2007: 158-167
11	EE	Katherine A. Yelick, Dan Bonachea, Wei-Yu Chen, Phillip Colella, Kaushik Datta, Jason Duell, Susan L. Graham, Paul Hargrove, Paul N. Hilfinger, Parry Husbands, Costin Iancu, Amir Kamil, Rajesh Nishtala, Jimmy Su, Michael L. Welcome, Tong Wen: Productivity and performance using partitioned global address space languages. PASCO 2007: 24-32
10	EE	John K. Zao, Yu-Chih Liu, Ming-Hsiao Yang, Sheng-Kun Li, Wei-Yu Chen, Ching-Wei Chen, Kuo-Chin Huang, Jwu-Sheng Hu, Lun-Chia Kuo: Ubiquitous e-Helpers: An UPnP-based home automation platform. SMC 2007: 3682-3689
2006
9	EE	Amitava Majumdar, Wei-Yu Chen, Jun Guo: Hold time validation on silicon and the relevance of hazards in timing analysis. DAC 2006: 326-331
8	EE	Sheng-Che Tseng, Chinchun Meng, Wei-Yu Chen: True 50% Duty-Cycle SSH and SHH SiGe BiCMOS Divide-by-3 Prescalers. IEICE Transactions 89-C(6): 725-731 (2006)
2005
7	EE	Wei-Yu Chen, Costin Iancu, Katherine A. Yelick: Communication Optimizations for Fine-Grained UPC Applications. IEEE PACT 2005: 267-278
2004
6	EE	Christian Bell, Wei-Yu Chen, Dan Bonachea, Katherine A. Yelick: Evaluating support for global address space languages on the Cray X1. ICS 2004: 184-195
2003
5	EE	Wei-Yu Chen, Arvind Krishnamurthy, Katherine A. Yelick: Polynomial-Time Algorithms for Enforcing Sequential Consistency in SPMD Programs with Arrays. LCPC 2003: 340-356
2002
4	EE	Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer: Analytical models for crosstalk excitation and propagation in VLSI circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 21(10): 1117-1131 (2002)
3	EE	Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer: Test Generation for Crosstalk-Induced Faults: Framework and Computational Results. J. Electronic Testing 18(1): 17-28 (2002)
2000
2	EE	Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer: Test generation for crosstalk-induced faults: framework and computational result. Asian Test Symposium 2000: 305-310
1999
1		Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer: Test generation for crosstalk-induced delay in integrated circuits. ITC 1999: 191-200

Coauthor Index

1	Ali-Reza Adl-Tabatabai	[15]
2	Christian Bell	[6]
3	Dan Bonachea	[6] [11] [12]
4	Melvin A. Breuer	[1] [2] [3] [4]
5	C. Y. Roger Chen	[13] [14]
6	Ching-Wei Chen	[10]
7	Ting Wei Chiang	[13] [14]
8	Phillip Colella	[11]
9	Kaushik Datta	[11]
10	Jason Duell	[11]
11	Susan L. Graham	[11]
12	Jun Guo	[9]
13	Sandeep K. Gupta	[1] [2] [3] [4]
14	Paul Hargrove	[11]
15	Paul N. Hilfinger	[11]
16	Jwu-Sheng Hu	[10]
17	Kuo-Chin Huang	[10]
18	Parry Husbands	[11]
19	Costin Iancu	[7] [11] [12]
20	Amir Kamil	[11]
21	Arvind Krishnamurthy	[5]
22	Lun-Chia Kuo	[10]
23	Sheng-Kun Li	[10]
24	Yu-Chih Liu	[10]
25	Amitava Majumdar	[9]
26	Chinchun Meng	[8]
27	Rajesh Nishtala	[11]
28	Bratin Saha	[15]
29	Jimmy Su	[11]
30	Sheng-Che Tseng	[8]
31	Cheng Wang	[15]
32	Michael L. Welcome	[11]
33	Tong Wen	[11]
34	Youfeng Wu	[15]
35	Ming-Hsiao Yang	[10]
36	Katherine A. Yelick	[5] [6] [7] [11] [12]
37	John K. Zao	[10]

Colors in the list of coauthors