| 2007 |
|---|
| 6 | EE | Ilhan Hatirnaz,
Stéphane Badel,
Nuria Pazos,
Yusuf Leblebici,
Srinivasan Murali,
David Atienza,
Giovanni De Micheli:
Early wire characterization for predictable network-on-chip global interconnects.
SLIP 2007: 57-64 |
| 2006 |
|---|
| 5 | EE | Elizabeth J. Brauer,
Ilhan Hatirnaz,
Stéphane Badel,
Yusuf Leblebici:
Via-programmable expanded universal logic gate in MCML for structured ASIC applications: circuit design.
ISCAS 2006 |
| 4 | EE | Stéphane Badel,
Ilhan Hatirnaz,
Yusuf Leblebici,
Elizabeth J. Brauer:
Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells.
VLSI-SoC 2006: 234-238 |
| 2004 |
|---|
| 3 | | Ilhan Hatirnaz,
Yusuf Leblebici:
Modelling and implementation of twisted differential on-chip interconnects for crosstalk noise reduction.
ISCAS (5) 2004: 185-188 |
| 2003 |
|---|
| 2 | EE | Turan Demirci,
Ilhan Hatirnaz,
Yusuf Leblebici:
Full-custom CMOS realization of a high-performance binary sorting engine with linear area-time complexity.
ISCAS (5) 2003: 453-456 |
| 1999 |
|---|
| 1 | EE | Ilhan Hatirnaz,
Frank K. Gürkaynak,
Yusuf Leblebici:
Realization of a programmable rank-order filter architecture using capacitive threshold logic gates.
ISCAS (1) 1999: 435-438 |
