7. MTV 2006: Austin, TX, USA

Magdy S. Abadir, Li-C. Wang, Jayanta Bhadra (Eds.): Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA. IEEE Computer Society 2006, ISBN 978-0-7695-2839-7 BibTeX

Introduction

Preface.
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Acknowledgement.
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Workshop Organizing Committee.
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Program Committee.
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Test

Paolo Bernardi, Leticia Maria Veiras Bolzani, Alberto Manzone, Marcella Guagliumi Massimo Osella, Massimo Violante, Matteo Sonza Reorda:
Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications. 3-8
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Jorge Campos, Hussain Al-Asaad:
Circuit Profiling Mechanisms for High-Level {ATPG}. 9-14
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Vijay Gangaram, Deepa Bhan, James K. Caldwell:
Functional Test Selection for High Volume Manufacturing. 15-19
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Jozsef Sziray:
Test Calculation for Logic and Delay Faults in Digital Circuits. 20-32
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Verification and Test Generation

Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy S. Abadir:
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study. 33-36
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Marc Herbstritt, Bernd Becker, Christoph Scholl:
Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs. 37-44
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Tamarah Arons, Elad Elster, Terry Murphy, Eli Singerman:
Embedded Software Validation: Applying Formal Techniques for Coverage and Test Generation. 45-51
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Noah Bamford, Rekha Bangalore, Eric Chapman, Hector Chavez, Rajeev Dasari, Yinfang Lin, Edgar Jimenez:
Challenges in System on Chip Verification. 52-60
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Architectural and Design Issues

Hassan Al-Sukhni, David Lindberg, James Holt, Michele Reese:
Workload Slicing for Characterizing New Features in High Performance Microprocessors. 61-67
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Hiren D. Patel, Sandeep K. Shukla:
Deep vs. Shallow, Kernel vs. Language--What is Better for Heterogeneous Modeling in {SystemC}?. 68-75
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Hyun Sung Kim, D. M. H. Walker:
Statistical Static Timing Analysis Considering the Impact of Power Supply Noise in {VLSI} Circuits. 76-82
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Jianmin Zhang, Ming Yan, Sikun Li:
Debug Support for Scalable System-on-Chip. 83-87
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Sean Safarpour, Andreas G. Veneris:
Abstraction and Refinement Techniques in Automated Design Debugging. 88-93
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Chia-Chih Yen, Ten Lin, Hermes Lin, Kai Yang, Ta-Yung Liu, Yu-Chin Hsu:
Diagnosing Silicon Failures Based on Functional Test Patterns. 94-98
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