| 2007 |
|---|
| 7 | EE | Andrew Kinane,
Noel E. O'Connor:
Energy-efficient Hardware Accelerators for the SA-DCT and Its Inverse.
VLSI Signal Processing 47(2): 127-152 (2007) |
| 2006 |
|---|
| 6 | EE | Andrew Kinane,
Valentin Muresan,
Noel E. O'Connor:
Optimisation of Constant Matrix Multiplication Operation Hardware Using a Genetic Algorithm.
EvoWorkshops 2006: 296-307 |
| 5 | EE | Daniel Larkin,
Andrew Kinane,
Noel E. O'Connor:
Towards Hardware Acceleration of Neuroevolution for Multimedia Processing Applications on Mobile Devices.
ICONIP (3) 2006: 1178-1188 |
| 4 | EE | Andrew Kinane,
Valentin Muresan,
Noel E. O'Connor:
Towards an optimised VLSI design algorithm for the constant matrix multiplication problem.
ISCAS 2006 |
| 3 | EE | Daniel Larkin,
Andrew Kinane,
Valentin Muresan,
Noel E. O'Connor:
An Efficient Hardware Architecture for a Neural Network Activation Function Generator.
ISNN (2) 2006: 1319-1327 |
| 2005 |
|---|
| 2 | | Andrew Kinane,
Alan Casey,
Valentin Muresan,
Noel E. O'Connor:
FPGA-Based Conformance Testing and System Prototyping of an MPEG-4 SA-DCT Hardware Accelerator.
FPT 2005: 317-318 |
| 2004 |
|---|
| 1 | EE | Andrew Kinane,
Valentin Muresan,
Noel E. O'Connor,
Noel Murphy,
Seán Marlow:
Energy-Efficient Hardware Architecture for Variable N-point 1D DCT.
PATMOS 2004: 780-788 |
