M. Kivioja
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1999
1
EE
M. Kivioja,
Jouni Isoaho
,
L. Vänskä
: Design and Implementation of Viterbi Decoder with FPGAs.
VLSI Signal Processing 21
(1): 5-14 (1999)
Coauthor
Index
1
Jouni Isoaho
[
1
]
2
L. Vänskä
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
