Sven Simon

2008
17	EE	Ana Balevic, Lars Rockstroh, A. Tausendfreund, S. Patzelt, G. Goch, Sven Simon: Accelerating Simulations of Light Scattering Based on Finite-Difference Time-Domain Method with General Purpose GPUs. CSE 2008: 327-334
16	EE	Ana Balevic, Lars Rockstroh, Marek Wróblewski, Sven Simon: Using Arithmetic Coding for Reduction of Resulting Simulation Data Size on Massively Parallel GPGPUs. PVM/MPI 2008: 295-302
2006
15	EE	Matthias Müller, Sven Simon, Holger Gryska, Andreas Wortmann, Steffen Buch: Low power synthesizable register files for processor and IP cores. Integration 39(2): 131-155 (2006)
2005
14		Matthias Müller, Sven Simon: Datenskalierung für die verlustleistungsarme Signalverarbeitung in Prozessorsystemen. GI Jahrestagung (1) 2005: 457
2004
13	EE	Andreas Wortmann, Sven Simon, Matthias Müller: A High-Speed Transceiver Architecture Implementable as Synthesizable IP Core. DATE 2004: 46-51
12		Sven Simon, Matthias Müller, Holger Gryska, Andreas Wortmann, Steffen Buch: An instruction set for the efficient implementation of the CORDIC algorithm. ISCAS (2) 2004: 357-360
11		Matthias Müller, Andreas Wortmann, Sven Simon, Michael Kugel, Tim Schoenauer: The impact of clock gating schemes on the power dissipation of synthesizable register files. ISCAS (2) 2004: 609-612
10	EE	Matthias Müller, Andreas Wortmann, Dominik Mader, Sven Simon: Register Isolation for Synthesizable Register Files. PATMOS 2004: 228-237
2003
9	EE	Marek Wróblewski, Matthias Müller, Andreas Wortmann, Sven Simon, Wilhelm Pieper, Josef A. Nossek: A power efficient register file architecture using master latch sharing. ISCAS (5) 2003: 393-396
2002
8	EE	Matthias Müller, Andreas Wortmann, Sven Simon, S. Wolter, Steffen Buch, Marek Wróblewski, Josef A. Nossek: Low power register file architecture for application specific DSPs. ISCAS (4) 2002: 89-92
1999
7	EE	Sven Simon, Marek Wróblewski: Low power datapath design using transformation similar to temporal localization of SFGs. ISCAS (1) 1999: 59-61
6	EE	Christian V. Schimpfle, Sven Simon, Josef A. Nossek: Device level based cell modeling for fast power estimation. ISCAS (1) 1999: 90-93
5	EE	Peter Rieder, Sven Simon, Christian V. Schimpfle: Application Specific Efficient VLSI Architectures for Orthogonal Single- and Multiwavelet Transforms. VLSI Signal Processing 21(2): 77-90 (1999)
1997
4	EE	Christian V. Schimpfle, Sven Simon, Josef A. Nossek: Low Power CORDIC Implementation Using Redundant Number Representation. ASAP 1997: 154-161
1995
3		Sven Simon, Johann Hofner, Josef A. Nossek: Retiming of Circuits Containing Multiplexers. ISCAS 1995: 1736-1739
2	EE	Sven Simon, Ralf Bucher, Josef A. Nossek: Retiming of synchronous circuits with variable topology. VLSI Design 1995: 130-134
1994
1		Sven Simon, Ernst G. Bernard, Matthias Sauer, Josef A. Nossek: A New Retiming Algorithm for Circuit Design. ISCAS 1994: 35-38

Coauthor Index

1	Ana Balevic	[16] [17]
2	Ernst G. Bernard	[1]
3	Steffen Buch	[8] [12] [15]
4	Ralf Bucher	[2]
5	G. Goch	[17]
6	Holger Gryska	[12] [15]
7	Johann Hofner	[3]
8	Michael Kugel	[11]
9	Dominik Mader	[10]
10	Matthias Müller	[8] [9] [10] [11] [12] [13] [14] [15]
11	Josef A. Nossek	[1] [2] [3] [4] [6] [8] [9]
12	S. Patzelt	[17]
13	Wilhelm Pieper	[9]
14	Peter Rieder	[5]
15	Lars Rockstroh	[16] [17]
16	Matthias Sauer	[1]
17	Christian V. Schimpfle	[4] [5] [6]
18	Tim Schoenauer	[11]
19	A. Tausendfreund	[17]
20	S. Wolter	[8]
21	Andreas Wortmann	[8] [9] [10] [11] [12] [13] [15]
22	Marek Wróblewski	[7] [8] [9] [16]