Microprocessors and Microsystems, Volume 25

Volume 25, Number 1, March 2001

• H. Y. Yang, S. J. Mertoguno, Nikolaos G. Bourbakis:
  Design of the Kydon-RISC processor. 1-18
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• G. W. Drost, Nikolaos G. Bourbakis:
  A hybrid system for real-time lossless image compression. 19-31
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• I. Y. Soon, C. K. Yeo, H. C. Ng:
  An analogue video interface for general-purpose DSP. 33-39
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• Giuseppe Anastasi, Luciano Lenzini, Yoram Ofek:
  Tradeoff between the cycle complexity and the fairness of ring networks. 41-59
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Volume 25, Number 2, April 2001

• Antonio Corradi:
  Mobile agent technology: from first proposals to current evolutions. 63-64
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• Gian Pietro Picco:
  Mobile agents: an introduction. 65-74
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• Paolo Bellavista, Antonio Corradi, Cesare Stefanelli:
  Middleware services for interoperability in open mobile agent systems. 75-83
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• Giacomo Cabri, Letizia Leonardi, Franco Zambonelli:
  Coordination infrastructures for mobile agents. 85-92
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• Rebecca Montanari, Cesare Stefanelli, Naranker Dulay:
  Flexible security policies for mobile agent systems. 93-99
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• Damianos Gavalas, Dominic P. A. Greenwood, Mohammed Ghanbari, Mike O'Mahony:
  Mobile software agents for decentralised network and systems management. 101-109
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• Aurelio La Corte, Antonio Puliafito, Orazio Tomarchio:
  QoS management in programmable networks through mobile agents. 111-120
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• Anand R. Tripathi, Tanvir Ahmed, Neeran M. Karnik:
  Experiences and future challenges in mobile agent programming. 121-129
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Volume 25, Number 3, May 2001

• Ayan Banerjee, Anindya Sundar Dhar, Swapna Banerjee:
  FPGA realization of a CORDIC based FFT processor for biomedical signal processing. 131-142
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• David M. Harvey, Shirish P. Kshirsagar, C. Allan Hobson:
  Low cost scaleable parallel image processing system. 143-157
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• José Luis Lázaro, Juan Carlos García, Manuel Mazo, Alfredo Gardel, Pedro Martín, Ignacio Fernández, Marta Marrón:
  Distributed architecture for control and path planning of autonomous vehicles. 159-166
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• G. Latif-Shabgahi, Julian M. Bass, Stuart Bennett:
  Component-oriented voter model for dependable control applications. 167-176
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• Miguel Damas, A. M. Prados, F. Gómez, G. Olivares:
  HidroBus^® system: fieldbus for integrated management of extensive areas of irrigated land. 177-184
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Volume 25, Number 4, June 2001

• Miguel Ángel Vega Rodríguez, Juan Manuel Sánchez-Pérez, Juan Antonio Gómez Pulido:
  An educational tool for testing caches on symmetric multiprocessors. 187-194
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• Imtiaz Ahmad:
  A distributed algorithm for finding prime compatibles on network of workstations. 195-202
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• D. N. Ramos-Hernandez, M. O. Tokhi:
  Performance evaluation of heterogeneous systems. 203-212
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• Geyong Min, Mohamed Ould-Khaoua:
  A performance model of pipelined circuit switching in hypercubes. 213-220
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• Yongwha Chung, Hiecheol Kim, Jin-Won Park, Kangwoo Lee:
  Performance evaluation for CC-NUMA multiprocessors using an OLTP workload. 221-229
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Volume 25, Number 5, August 2001

• K. Rajan, Lalit M. Patnaik:
  CBP and ART image reconstruction algorithms on media and DSP processors. 233-238
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• Jehad Al-Sadi, Khaled Day, Mohamed Ould-Khaoua:
  Unsafety vectors: a new fault-tolerant routing for k-Ary n-cubes. 239-246
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• Kyoung-Mook Lim, Seh-Woong Jeong, Yong-Chun Kim, H. S. Yang:
  CalmRISC^TM: a low power microcontroller with efficient coprocessor interface. 247-261
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• Jim Harkin, T. Martin McGinnity, Liam P. Maguire:
  Genetic algorithm driven hardware-software partitioning for dynamically reconfigurable embedded systems. 263-274
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Volume 25, Number 6, September 2001

• Hamid Sarbazi-Azad, Mohamed Ould-Khaoua, Lewis M. Mackenzie:
  On the performance of adaptive wormhole routing in the bi-directional torus network: a hot spot analysis. 277-285
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• M. Jenko, N. Medjeral, P. Butala:
  Component-based software as a framework for concurrent design of programs and platforms - an industrial kitchen appliance embedded system. 287-296
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• A. P. Johnson, M. W. S. Macauley:
  High precision timing within Microsoft Windows: threads, scheduling and system interrupts. 297-307
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• Antonella Santone, Gigliola Vaglini:
  Reusing LOTOS specifications. 309-314
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Volume 25, Number 7, October 2001

• A. H. G. Al-Dhaher:
  Integrating hardware and software for the development of microcontroller-based systems. 317-328
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• Cheol Ho Park, Daeyeon Park:
  Aggressive superpage support with the shadow memory and the partial-subblock TLB. 329-342
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• Damian M. Gonzalez, Alan D. George, Matthew C. Chidester:
  Performance modeling and evaluation of topologies for low-latency SCI systems. 343-356
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Volume 25, Number 8, November 2001

• Meng Joo Er, Aik Chong Lua, Jimmy Han Leong Kay, Chee Chong Lim:
  Design and development of a low-cost digital display for water flow rate measurements. 359-368
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• Meng Joo Er, Moo Teng Lim, Hui Song Lim:
  Real-time hybrid adaptive fuzzy control of a SCARA robot. 369-378
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• Panagiotis G. Tzionas:
  A cellular neural network modeling the behavior of reconfigurable cellular automata. 379-387
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• Alireza Shahrabi, Mohamed Ould-Khaoua, Lewis M. Mackenzie:
  Analytical modelling of broadcast in adaptive wormhole-routed hypercubes. 389-398
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Volume 25, Numbers 9-10, January 2002

• Nicoletta De Francesco, Antonella Santone:
  A tool supporting efficient model checking of concurrent specifications. 401-407
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• Royan H. L. Ong, Michael J. Pont:
  The impact of instruction pointer corruption on program flow: A computational modelling study. 409-419
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• Ge Gao, P. C. Ching, Tan Lee:
  A new approach to generating Pitch Cycle Waveform (PCW) for Waveform Interpolation codec. 421-426
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• Zoran Salcic:
  ISDE - an integrated systems development environment for custom-computing machines implemented in FPLDs. 427-435
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• Tien-Fu Chen, Yi-Min Hwang:
  Decoupling of data and tag arrays for on-chip caches. 437-447
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• S. Ramachandran, S. Srinivasan:
  A fast, FPGA-based MPEG-2 video encoder with a novel automatic quality control scheme. 449-457
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• Witawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang:
  Object resizing and reclamation through the use of hardware bit-maps. 459-467
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• Toshinori Sato:
  Evaluating the impact of reissued instructions on data speculative processor performance. 469-482
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