| |
| 2005 | ||
|---|---|---|
| 2 | EE | Phillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky: Characterization of logic circuit techniques and optimization for high-leakage CMOS technologies. Integration 38(3): 491-504 (2005) |
| 2004 | ||
| 1 | EE | Phillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky: Characterization of logic circuit techniques for high leakage CMOS technologies. ACM Great Lakes Symposium on VLSI 2004: 230-235 |
| 1 | George Gristede | [1] [2] |
| 2 | Stephen V. Kosonocky | [1] [2] |
| 3 | Charles A. Zukowski | [1] [2] |