| |
| 1997 | ||
|---|---|---|
| 5 | EE | A. Dharchoudhuri, S. M. Kang: Analytical Fast Timing Simulation of MOS Circuits Driving RC Interconnects. VLSI Design 1997: 111-117 |
| 1993 | ||
| 4 | Dae-Hyung Cho, S. M. Kang: An Accurate AC Characteristic Table Look-up Model for VLSI Analog Circuits Simulation Applications. ISCAS 1993: 1531-1534 | |
| 1989 | ||
| 3 | EE | Andrew T. Yang, S. M. Kang: iSMILE: A Novel Circuit Simulation Program with Emphasis on New Device Model Development. DAC 1989: 630-633 |
| 1988 | ||
| 2 | EE | Wei Shu, Min-You Wu, S. M. Kang: Improved net merging method for gate matrix layout. IEEE Trans. on CAD of Integrated Circuits and Systems 7(9): 947-951 (1988) |
| 1986 | ||
| 1 | EE | R. D. Freeman, S. M. Kang, C. G. Lin-Hendel, M. L. Newby: Automated extraction of SPICE circuit models from symbolic gate matrix layout with pruning. DAC 1986: 418-424 |
| 1 | Dae-Hyung Cho | [4] |
| 2 | A. Dharchoudhuri | [5] |
| 3 | R. D. Freeman | [1] |
| 4 | C. G. Lin-Hendel | [1] |
| 5 | M. L. Newby | [1] |
| 6 | Wei Shu | [2] |
| 7 | Min-You Wu | [2] |
| 8 | Andrew T. Yang | [3] |