| 2006 |
|---|
| 10 | EE | Zhuoyu Bao,
Suriya A. Kumar,
David M. Wu,
Vimal K. Natarajan,
Mike Lin:
A Low Cost, High Quality Embedded Array DFT Technique for High Performance Processors.
DELTA 2006: 57-63 |
| 2004 |
|---|
| 9 | EE | David M. Wu,
Mike Lin,
Madhukar Reddy,
Talal Jaber,
Anil Sabbavarapu,
Larry Thatcher:
An Optimized DFT and Test Pattern Generation Strategy for an Intel High Performance Microprocessor.
ITC 2004: 38-47 |
| 2003 |
|---|
| 8 | EE | David M. Wu,
Mike Lin,
Subhasish Mitra,
Kee Sup Kim,
Anil Sabbavarapu,
Talal Jaber,
Pete Johnson,
Dale March,
Greg Parrish:
H-DFT: A Hybrid DFT Architecture For Low-Cost High Quality Structural Testing.
ITC 2003: 1229-1238 |
| 2002 |
|---|
| 7 | EE | David M. Wu:
Trouble With Scan.
ITC 2002: 1199-1200 |
| 2000 |
|---|
| 6 | EE | Chao-Wen Tseng,
Edward J. McCluskey,
Xiaoping Shao,
David M. Wu:
Cold Delay Defect Screening.
VTS 2000: 183-188 |
| 1999 |
|---|
| 5 | | David M. Wu:
DFT is all I can afford, who cares about Design for Yield or Design for Reliability!
ITC 1999: 1141-1142 |
| 4 | | David M. Wu:
"DFY and DFR are more important than DFT".
ITC 1999: 1147 |
| 1991 |
|---|
| 3 | EE | David M. Wu,
Charles E. Radke:
Delay Test Effectiveness Evaluation of LSSD-Based VLSI Vogic Circuits.
DAC 1991: 291-295 |
| 1986 |
|---|
| 2 | | David M. Wu,
Charles E. Radke,
J. P. Roth:
Statistical AC Test Coverage.
ITC 1986: 538-541 |
| 1984 |
|---|
| 1 | | David M. Wu,
Charles E. Radke,
C. C. Beh:
Improve Yield and Quality Through Testability Analysis of VLSI Circuits.
ITC 1984: 713-717 |
