H. Wong

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12EEC. K. Kwong, K. Y. Chan, H. Wong: Takagi-Sugeno neural fuzzy modeling approach to fluid dispensing for electronic packaging. Expert Syst. Appl. 34(3): 2111-2119 (2008)
11EEC. K. Kwong, Y. Chen, K. Y. Chan, H. Wong: The Hybrid Fuzzy Least-Squares Regression Approach to Modeling ManufacturingProcesses. IEEE T. Fuzzy Systems 16(3): 644-651 (2008)
10EEY. Fu, H. Wong, J. J. Liou: Characterization and modeling of flicker noise in junction field-effect transistor with source and drain trench isolation. Microelectronics Reliability 47(1): 46-50 (2007)
9EEC. K. Wong, H. Wong, M. Chan, C. W. Kok, H. P. Chan: Minimizing hydrogen content in silicon oxynitride by thermal oxidation of silicon-rich silicon nitride. Microelectronics Reliability 46(12): 2056-2061 (2006)
8EEChi Kin Chan, Brian G. Kingsman, H. Wong: Determining when to update the weights in combined forecasts for product demand--an application of the CUSUM technique. European Journal of Operational Research 153(3): 757-768 (2004)
7EEB. L. Yang, P. T. Lai, H. Wong: Conduction mechanisms in MOS gate dielectric films. Microelectronics Reliability 44(5): 709-718 (2004)
6EEPaulo J. G. Lisboa, H. Wong, P. Harris, R. Swindell: A Bayesian neural network approach for modelling censored data with an application to prognosis after surgery for breast cancer. Artificial Intelligence in Medicine 28(1): 1-25 (2003)
5EEB. L. Yang, N. W. Cheung, S. Denholm, J. Shao, H. Wong, P. T. Lai, Y. C. Cheng: Ultra-shallow n+p junction formed by PH3 and AsH3 plasma immersion ion implantation. Microelectronics Reliability 42(12): 1985-1989 (2002)
4EEPaulo J. G. Lisboa, Alfredo Vellido, H. Wong: Bias reduction in skewed binary classification with Bayesian neural networks. Neural Networks 13(4-5): 407-410 (2000)
3EEY. K. Wong, Roy Leitch, G. J. Wyatt, H. Wong: Causal reasoning in systems modelling. Int. J. Systems Science 29(11): 1325-1337 (1998)
2 W. K. Luk, Y. Katayama, Wei Hwang, Matthew R. Wordeman, T. Kirihata, Akashi Satoh, Seiji Munetoh, H. Wong, B. El-Kareh, P. Xiao, Rajiv V. Joshi: Development of a High Bandwidth Merged Logic/DRAM Multimedia Chip. ICCD 1997: 279-285
1EEJ. Häuser, H. Wong, Wolfgang Gentzsch, Hans-Georg Paap: Parallel computing in aerospace using multi-block grids. Part 1: Application to grid generation. Concurrency - Practice and Experience 4(5): 357-376 (1992)

Coauthor Index

1Chi Kin Chan [8]
2H. P. Chan [9]
3K. Y. Chan [11] [12]
4M. Chan [9]
5Y. Chen [11]
6Y. C. Cheng [5]
7N. W. Cheung [5]
8S. Denholm [5]
9B. El-Kareh [2]
10Y. Fu [10]
11Wolfgang Gentzsch [1]
12P. Harris [6]
13J. Häuser [1]
14Wei Hwang [2]
15Rajiv V. Joshi [2]
16Y. Katayama [2]
17Brian G. Kingsman [8]
18T. Kirihata [2]
19C. W. Kok [9]
20C. K. Kwong [11] [12]
21P. T. Lai [5] [7]
22Roy Leitch [3]
23J. J. Liou [10]
24Paulo J. G. Lisboa [4] [6]
25W. K. Luk [2]
26Seiji Munetoh [2]
27Hans-Georg Paap [1]
28Akashi Satoh [2]
29J. Shao [5]
30R. Swindell [6]
31Alfredo Vellido [4]
32Chak-Kuen Wong (C. K. Wong) [9]
33Y. K. Wong [3]
34Matthew R. Wordeman [2]
35G. J. Wyatt [3]
36P. Xiao [2]
37B. L. Yang [5] [7]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)