| 1997 |
|---|
| 5 | | W. K. Luk,
Y. Katayama,
Wei Hwang,
Matthew R. Wordeman,
T. Kirihata,
Akashi Satoh,
Seiji Munetoh,
H. Wong,
B. El-Kareh,
P. Xiao,
Rajiv V. Joshi:
Development of a High Bandwidth Merged Logic/DRAM Multimedia Chip.
ICCD 1997: 279-285 |
| 1987 |
|---|
| 4 | | W. K. Luk,
Paolo Sipala,
C. K. Wong:
Minimum-Area Wiring for Slicing Structures.
IEEE Trans. Computers 36(6): 745-760 (1987) |
| 3 | EE | W. K. Luk,
Paolo Sipala,
Markku Tamminen,
Donald T. Tang,
Lin S. Woo,
Chak-Kuen Wong:
A Hierarchical Global Wiring Algorithm for Custom Chip Design.
IEEE Trans. on CAD of Integrated Circuits and Systems 6(4): 518-533 (1987) |
| 1986 |
|---|
| 2 | EE | W. K. Luk,
Donald T. Tang,
C. K. Wong:
Hierarchial global wiring for custom chip design.
DAC 1986: 481-489 |
| 1 | | Markku Tamminen,
W. K. Luk,
Paolo Sipala,
Lin S. Woo,
C. K. Wong:
Constructing Maximal Slicings from Geometry.
Acta Inf. 23(3): 267-288 (1986) |
