2009 | ||
---|---|---|
2 | EE | Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Philip Brisk, Yusuf Leblebici, Paolo Ienne, Maurizio Skerlj: 3D configuration caching for 2D FPGAs. FPGA 2009: 286 |
2008 | ||
1 | EE | Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Philip Brisk, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne: Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs. FPGA 2008: 181-190 |
1 | Philip Brisk | [1] [2] |
2 | Alessandro Cevrero | [1] [2] |
3 | Frank K. Gürkaynak | [1] |
4 | Paolo Ienne | [1] [2] |
5 | Yusuf Leblebici | [1] [2] |
6 | Hadi Parandeh-Afshar | [1] [2] |
7 | Maurizio Skerlj | [2] |
8 | Ajay K. Verma | [1] |