dblp.uni-trier.dewww.uni-trier.de

Enric Gibert

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2006
8EEEnric Gibert, F. Jesús Sánchez, Antonio González: Instruction scheduling for a clustered VLIW processor with a word-interleaved cache. Concurrency and Computation: Practice and Experience 18(11): 1391-1411 (2006)
7EEAlex Settle, Dan Connors, Enric Gibert, Antonio González: A dynamically reconfigurable cache for multithreaded processors. J. Embedded Computing 2(2): 221-233 (2006)
2005
6EEEnric Gibert, Jaume Abella, F. Jesús Sánchez, Xavier Vera, Antonio González: Variable-Based Multi-module Data Caches for Clustered VLIW Processors. IEEE PACT 2005: 207-217
5EEEnric Gibert, F. Jesús Sánchez, Antonio González: Distributed Data Cache Designs for Clustered VLIW Processors. IEEE Trans. Computers 54(10): 1227-1241 (2005)
2003
4EEEnric Gibert, F. Jesús Sánchez, Antonio González: Local Scheduling Techniques for Memory Coherence in a Clustered VLIW Processor with a Distributed Data Cache. CGO 2003: 193-203
3EEEnric Gibert, F. Jesús Sánchez, Antonio González: Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors. MICRO 2003: 315-325
2002
2EEEnric Gibert, F. Jesús Sánchez, Antonio González: An interleaved cache clustered VLIW processor. ICS 2002: 210-219
1EEEnric Gibert, F. Jesús Sánchez, Antonio González: Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor. MICRO 2002: 123-133

Coauthor Index

1Jaume Abella [6]
2Daniel A. Connors (Dan Connors) [7]
3Antonio González [1] [2] [3] [4] [5] [6] [7] [8]
4F. Jesús Sánchez [1] [2] [3] [4] [5] [6] [8]
5Alex Settle [7]
6Xavier Vera [6]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)