Arindam Mukherjee

2007
18	EE	Fei Su, William L. Hwang, Arindam Mukherjee, Krishnendu Chakrabarty: Testing and Diagnosis of Realistic Defects in Digital Microfluidic Biochips. J. Electronic Testing 23(2-3): 219-233 (2007)
17	EE	Steven D. Tucker, Arun Ravindran, Christopher Wichman, Arindam Mukherjee: Design Techniques for Micro-Power Algorithmic Analog-to-Digital Converters. J. Low Power Electronics 3(1): 60-69 (2007)
2006
16	EE	Srikanth Mohan, Arun Ravindran, David Binkley, Arindam Mukherjee: Power Optimized Design of CMOS Programmable Gain Amplifiers. J. Low Power Electronics 2(2): 259-270 (2006)
15	EE	Kushal Datta, Arindam Mukherjee, Arun Ravindran: Automated design flow for diode-based nanofabrics. JETC 2(3): 219-241 (2006)
14	EE	Daniel Davids, Siddhartha Datta, Arindam Mukherjee, Bharat Joshi, Arun Ravindran: Multiple fault diagnosis in digital microfluidic biochips. JETC 2(4): 262-276 (2006)
2004
13	EE	Arindam Mukherjee: On the Reduction of Simultaneous Switching in SoCs. ISVLSI 2004: 262-263
2003
12	EE	Arindam Mukherjee, Krishna Reddy Dusety, Rajsaktish Sankaranarayan: A practical CAD technique for reducing power/ground noise in DSM circuits. ACM Great Lakes Symposium on VLSI 2003: 96-99
11	EE	Arindam Mukherjee, Malgorzata Marek-Sadowska: Clock and Power Gating with Timing Closure. IEEE Design & Test of Computers 20(3): 32-39 (2003)
10	EE	Arindam Mukherjee, Malgorzata Marek-Sadowska: Wave steering to integrate logic and physical syntheses. IEEE Trans. VLSI Syst. 11(1): 105-120 (2003)
9	EE	Amit Singh, Arindam Mukherjee, Luca Macchiarulo, Malgorzata Marek-Sadowska: PITIA: an FPGA for throughput-intensive applications. IEEE Trans. VLSI Syst. 11(3): 354-363 (2003)
2002
8	EE	Lars Frank, Arindam Mukherjee: Distributed Electronic Patient Encounter With High Performance and Availability. CBMS 2002: 373-376
7	EE	Arindam Mukherjee, Kai Wang, Lauren Hui Chen, Malgorzata Marek-Sadowska: Sizing Power/Ground Meshes for Clocking and Computing Circuit Components. DATE 2002: 176-185
2001
6	EE	Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska: Latency and Latch Count Minimization in Wave Steered Circuits. DAC 2001: 383-388
5	EE	Nobuo Funabiki, Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska: A Global Routing Technique for Wave-Steering Design Methodology. DSD 2001: 430-437
4	EE	Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska: Interconnect pipelining in a throughput-intensive FPGA architecture. FPGA 2001: 153-160
3	EE	Ganapathy Parthasarathy, Malgorzata Marek-Sadowska, Arindam Mukherjee, Amit Singh: Interconnect complexity-aware FPGA placement using Rent's rule. SLIP 2001: 115-121
2000
2	EE	Amit Singh, Luca Macchiarulo, Arindam Mukherjee, Malgorzata Marek-Sadowska: A novel high throughput reconfigurable FPGA architecture. FPGA 2000: 22-29
1999
1	EE	Arindam Mukherjee, Ranganathan Sudhakar, Malgorzata Marek-Sadowska, Stephen I. Long: Wave Steering in YADDs: A Novel Non-Iterative Synthesis and Layout Technique. DAC 1999: 466-471

Coauthor Index

1	David Binkley	[16]
2	Krishnendu Chakrabarty	[18]
3	Lauren Hui Chen	[7]
4	Kushal Datta	[15]
5	Siddhartha Datta	[14]
6	Daniel Davids	[14]
7	Krishna Reddy Dusety	[12]
8	Lars Frank	[8]
9	Nobuo Funabiki	[5]
10	William L. Hwang	[18]
11	Bharat Joshi	[14]
12	Stephen I. Long	[1]
13	Luca Macchiarulo	[2] [9]
14	Malgorzata Marek-Sadowska	[1] [2] [3] [4] [5] [6] [7] [9] [10] [11]
15	Srikanth Mohan	[16]
16	Ganapathy Parthasarathy	[3]
17	Arun Ravindran	[14] [15] [16] [17]
18	Rajsaktish Sankaranarayan	[12]
19	Amit Singh	[2] [3] [4] [5] [6] [9]
20	Fei Su	[18]
21	Ranganathan Sudhakar	[1]
22	Steven D. Tucker	[17]
23	Kai Wang	[7]
24	Christopher Wichman	[17]

Colors in the list of coauthors