Mark Bourgeault

2005
3	EE	David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose: The Stratix II logic and routing architecture. FPGA 2005: 14-20
2004
2	EE	Michael Hutton, Jay Schleicher, David M. Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu, Gregg Baeckler, Boris Ratchev, Ketan Padalia, Mark Bourgeault, Andy Lee, Henry Kim, Rahul Saini: Improving FPGA Performance and Area Using an Adaptive Logic Module. FPL 2004: 135-144
2003
1	EE	Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron Egier, Jonathan Rose: Automatic transistor and physical design of FPGA tiles from an architectural specification. FPGA 2003: 164-172

Coauthor Index

1	Elias Ahmed	[3]
2	Gregg Baeckler	[2] [3]
3	Vaughn Betz	[3]
4	David Cashman	[3]
5	Richard Cliff	[3]
6	Aaron Egier	[1]
7	Ryan Fung	[1]
8	David R. Galloway	[3]
9	Michael Hutton (Michael D. Hutton, Mike Hutton)	[2] [3]
10	Sinan Kaptanoglu	[2]
11	Henry Kim	[2]
12	Christopher Lane	[3]
13	Andy Lee	[2] [3]
14	Paul Leventis	[3]
15	David M. Lewis	[2] [3]
16	Sandy Marquardt	[3]
17	Cameron McClintock	[3]
18	Ketan Padalia	[1] [2] [3]
19	Bruce Pedersen	[2] [3]
20	Giles Powell	[3]
21	Boris Ratchev	[2] [3]
22	Srinivas Reddy	[3]
23	Jonathan Rose	[1] [3]
24	Rahul Saini	[2]
25	Jay Schleicher	[2] [3]
26	Kevin Stevens	[3]
27	Richard Yuan	[2] [3]