Andy Lee

2009
4	EE	David Lewis, Elias Ahmed, David Cashman, Tim Vanderhoek, Christopher Lane, Andy Lee, Philip Pan: Architectural enhancements in Stratix-IIITM and Stratix-IVTM. FPGA 2009: 33-42
2005
3	EE	David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose: The Stratix II logic and routing architecture. FPGA 2005: 14-20
2004
2	EE	Michael Hutton, Jay Schleicher, David M. Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu, Gregg Baeckler, Boris Ratchev, Ketan Padalia, Mark Bourgeault, Andy Lee, Henry Kim, Rahul Saini: Improving FPGA Performance and Area Using an Adaptive Logic Module. FPL 2004: 135-144
2003
1	EE	David M. Lewis, Vaughn Betz, David Jefferson, Andy Lee, Christopher Lane, Paul Leventis, Sandy Marquardt, Cameron McClintock, Bruce Pedersen, Giles Powell, Srinivas Reddy, Chris Wysocki, Richard Cliff, Jonathan Rose: The StratixTM routing and logic architecture. FPGA 2003: 12-20

Coauthor Index

1	Elias Ahmed	[3] [4]
2	Gregg Baeckler	[2] [3]
3	Vaughn Betz	[1] [3]
4	Mark Bourgeault	[2] [3]
5	David Cashman	[3] [4]
6	Richard Cliff	[1] [3]
7	David R. Galloway	[3]
8	Michael Hutton (Michael D. Hutton, Mike Hutton)	[2] [3]
9	David Jefferson	[1]
10	Sinan Kaptanoglu	[2]
11	Henry Kim	[2]
12	Christopher Lane	[1] [3] [4]
13	Paul Leventis	[1] [3]
14	David Lewis	[4]
15	David M. Lewis	[1] [2] [3]
16	Sandy Marquardt	[1] [3]
17	Cameron McClintock	[1] [3]
18	Ketan Padalia	[2] [3]
19	Philip Pan	[4]
20	Bruce Pedersen	[1] [2] [3]
21	Giles Powell	[1] [3]
22	Boris Ratchev	[2] [3]
23	Srinivas Reddy	[1] [3]
24	Jonathan Rose	[1] [3]
25	Rahul Saini	[2]
26	Jay Schleicher	[2] [3]
27	Kevin Stevens	[3]
28	Tim Vanderhoek	[4]
29	Chris Wysocki	[1]
30	Richard Yuan	[2] [3]