dblp.uni-trier.dewww.uni-trier.de

Ching-Long Su

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

1996
9EEChing-Long Su, Yin-Tsung Hwang: Distributed arithmetic-based architectures for high speed IIR filter design. ICPADS 1996: 156-161
1995
8EEChing-Long Su, Alvin M. Despain: Cache designs for energy efficiency. HICSS (1) 1995: 306-315
7EEChing-Long Su, Alvin M. Despain: Cache design trade-offs for power and performance optimization: a case study. ISLPD 1995: 63-68
1994
6 Ching-Long Su, Chi-Ying Tsui, Alvin M. Despain: Lower Power Architecture Design and Compilation Techniques for High-Performance Processors. COMPCON 1994: 489-498
5 Ching-Long Su, Chin-Chi Teng, Alvin M. Despain: A Study of Cache Hashing Functions for Symbolic Applications in Micro-Parallel Processors. ICPADS 1994: 530-537
4 Ching-Long Su, Alvin M. Despain: Branch with Masked Squashing in Superpipelined Processors. ISCA 1994: 130-140
3EEChing-Long Su, Alvin M. Despain: Minimizing branch misprediction penalties for superpipelined processors. MICRO 1994: 138-142
2EEChing-Long Su, Chi-Ying Tsui, Alvin M. Despain: Saving Power in the Control Path of Embedded Processors. IEEE Design & Test of Computers 11(4): 24-30 (1994)
1992
1EEIksoo Pyo, Ching-Long Su, Ing-Jer Huang, Kuo-Rueih Pan, Yong-Seon Koh, Chi-Ying Tsui, Hsu-Tsun Chen, Gino Cheng, Shihming Liu, Shiqun Wu, Alvin M. Despain: Application-Driven Design Automation for Microprocessor Design. DAC 1992: 512-517

Coauthor Index

1Hsu-Tsun Chen [1]
2Gino Cheng [1]
3Alvin M. Despain [1] [2] [3] [4] [5] [6] [7] [8]
4Ing-Jer Huang [1]
5Yin-Tsung Hwang [9]
6Yong-Seon Koh [1]
7Shihming Liu [1]
8Kuo-Rueih Pan [1]
9Iksoo Pyo [1]
10Chin-Chi Teng [5]
11Chi-Ying Tsui [1] [2] [6]
12Shiqun Wu [1]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)