2006 |
4 | EE | Noriyuki Ito,
Akira Kanuma,
Daisuke Maruyama,
Hitoshi Yamanaka,
Tsuyoshi Mochizuki,
Osamu Sugawara,
Chihiro Endoh,
Masahiro Yanagida,
Takeshi Kono,
Yutaka Isoda,
Kazunobu Adachi,
Takahisa Hiraide,
Shigeru Nagasawa,
Yaroku Sugiyama,
Eizo Ninoi:
Delay defect screening for a 2.16GHz SPARC64 microprocessor.
ASP-DAC 2006: 342-347 |
3 | EE | Noriyuki Ito,
Hideaki Katagiri,
Ryoichi Yamashita,
Hiroshi Ikeda,
Hiroyuki Sugiyama,
Hiroaki Komatsu,
Yoshiyasu Tanamura,
Akihiro Yoshitake,
Kazuhiro Nonomura,
Kinya Ishizaka,
Hiroaki Adachi,
Yutaka Mori,
Yutaka Isoda,
Yaroku Sugiyama:
Diagonal routing in high performance microprocessor design.
ASP-DAC 2006: 624-629 |
2004 |
2 | EE | Daisuke Maruyama,
Akira Kanuma,
Takashi Mochiyama,
Hiroaki Komatsu,
Yaroku Sugiyama,
Noriyuki Ito:
Detection of multiple transitions in delay fault test of SPARC64 microprocessor.
ICCAD 2004: 893-898 |
2003 |
1 | EE | Noriyuki Ito,
Hiroaki Komatsu,
Yoshiyasu Tanamura,
Ryoichi Yamashita,
Hiroyuki Sugiyama,
Yaroku Sugiyama,
Hirofumi Hamamura:
A Physical Design Methodology for 1.3GHz SPARC64 Microprocessor.
ICCD 2003: 204-210 |