2007 |
3 | EE | Noriyuki Ito,
Hiroaki Komatsu,
Akira Kanuma,
Akihiro Yoshitake,
Yoshiyasu Tanamura,
Hiroyuki Sugiyama,
Ryoichi Yamashita,
Ken-ichi Nabeya,
Hironobu Yoshino,
Hitoshi Yamanaka,
Masahiro Yanagida,
Yoshitomo Ozeki,
Kinya Ishizaka,
Takeshi Kono,
Yutaka Isoda:
Design Methodology for 2.4GHz Dual-Core Microprocessor.
ASP-DAC 2007: 896-901 |
2006 |
2 | EE | Noriyuki Ito,
Akira Kanuma,
Daisuke Maruyama,
Hitoshi Yamanaka,
Tsuyoshi Mochizuki,
Osamu Sugawara,
Chihiro Endoh,
Masahiro Yanagida,
Takeshi Kono,
Yutaka Isoda,
Kazunobu Adachi,
Takahisa Hiraide,
Shigeru Nagasawa,
Yaroku Sugiyama,
Eizo Ninoi:
Delay defect screening for a 2.16GHz SPARC64 microprocessor.
ASP-DAC 2006: 342-347 |
1 | EE | Noriyuki Ito,
Hideaki Katagiri,
Ryoichi Yamashita,
Hiroshi Ikeda,
Hiroyuki Sugiyama,
Hiroaki Komatsu,
Yoshiyasu Tanamura,
Akihiro Yoshitake,
Kazuhiro Nonomura,
Kinya Ishizaka,
Hiroaki Adachi,
Yutaka Mori,
Yutaka Isoda,
Yaroku Sugiyama:
Diagonal routing in high performance microprocessor design.
ASP-DAC 2006: 624-629 |