Ann Gordon-Ross

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19EEWeixun Wang, Prabhat Mishra, Ann Gordon-Ross: SACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems. VLSI Design 2009: 547-552
18EEAnn Gordon-Ross, Jeremy Lau, Brad Calder: Phase-based cache reconfiguration for a highly-configurable two-level cache hierarchy. ACM Great Lakes Symposium on VLSI 2008: 379-382
17EEPablo Viana, Ann Gordon-Ross, Edna Barros, Frank Vahid: A table-based method for single-pass cache optimization. ACM Great Lakes Symposium on VLSI 2008: 71-76
16 Chris Conger, Ann Gordon-Ross, Alan D. George: Design Framework for Partial Run-Time FPGA Reconfiguration. ERSA 2008: 122-128
15EEKarthik Sabhanatarajan, Ann Gordon-Ross: A resource efficient content inspection system for next generation Smart NICs. ICCD 2008: 156-163
14EEKarthik Sabhanatarajan, Ann Gordon-Ross, Mark Oden, Mukund Navada, Alan D. George: Smart-NICs: Power Proxying for Reduced Power Consumption in Network Edge Devices. ISVLSI 2008: 75-80
13EEBaoke Zhang, Karthik Sabhanatarajan, Ann Gordon-Ross, Alan D. George: Real-time performance analysis of Adaptive Link Rate. LCN 2008: 282-288
12EEAnn Gordon-Ross, Frank Vahid: A Self-Tuning Configurable Cache. DAC 2007: 234-237
11EEAnn Gordon-Ross, Pablo Viana, Frank Vahid, Walid A. Najjar, Edna Barros: A one-shot configurable-cache tuner for improved energy and performance. DATE 2007: 755-760
10EEPablo Viana, Ann Gordon-Ross, Eamonn J. Keogh, Edna Barros, Frank Vahid: Configurable cache subsetting for fast cache tuning. DAC 2006: 695-700
9EEAnn Gordon-Ross, Frank Vahid, Nikil Dutt: A first look at the interplay of code reordering and configurable caches. ACM Great Lakes Symposium on VLSI 2005: 416-421
8EEAnn Gordon-Ross, Frank Vahid, Nikil D. Dutt: Fast configurable-cache tuning with a unified second-level cache. ISLPED 2005: 323-326
7EEAnn Gordon-Ross, Frank Vahid: Frequent Loop Detection Using Efficient Nonintrusive On-Chip Hardware. IEEE Trans. Computers 54(10): 1203-1215 (2005)
6EEAnn Gordon-Ross, Frank Vahid, Nikil Dutt: Automatic Tuning of Two-Level Caches to Embedded Applications. DATE 2004: 208-213
5EEAnn Gordon-Ross, Frank Vahid: Frequent loop detection using efficient non-intrusive on-chip hardware. CASES 2003: 117-124
4EEAnn Gordon-Ross, Susan Cotterell, Frank Vahid: Tiny instruction caches for low power embedded systems. ACM Trans. Embedded Comput. Syst. 2(4): 449-481 (2003)
3EEAnn Gordon-Ross, Frank Vahid: Dynamic Loop Caching Meets Preloaded Loop Caching - A Hybrid Approach. ICCD 2002: 446-449
2EEAnn Gordon-Ross, Susan Cotterell, Frank Vahid: Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example. Computer Architecture Letters 1: (2002)
1EEFrank Vahid, Ann Gordon-Ross: A self-optimizing embedded microprocessor using a loop table for low power. ISLPED 2001: 219-224

Coauthor Index

1Edna Barros [10] [11] [17]
2Brad Calder [18]
3Chris Conger [16]
4Susan Cotterell [2] [4]
5Nikil D. Dutt (Nikil Dutt) [6] [8] [9]
6Alan D. George [13] [14] [16]
7Eamonn J. Keogh [10]
8Jeremy Lau [18]
9Prabhat Mishra [19]
10Walid A. Najjar [11]
11Mukund Navada [14]
12Mark Oden [14]
13Karthik Sabhanatarajan [13] [14] [15]
14Frank Vahid [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [17]
15Pablo Viana [10] [11] [17]
16Weixun Wang [19]
17Baoke Zhang [13]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)