| 2008 |
|---|
| 55 | | Mark A. Franklin,
Dhabaleswar K. Panda,
Dimitrios Stiliadis:
Proceedings of the 2008 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2008, San Jose, California, USA, November 6-7, 2008
ACM 2008 |
| 54 | EE | Michela Becchi,
Mark A. Franklin,
Patrick Crowley:
A workload for evaluating deep packet inspection architectures.
IISWC 2008: 79-89 |
| 2007 |
|---|
| 53 | EE | Michela Becchi,
Mark A. Franklin,
Patrick Crowley:
Performance/area efficiency in chip multiprocessors with micro-caches.
Conf. Computing Frontiers 2007: 247-258 |
| 52 | EE | Saurabh Gayen,
Eric J. Tyson,
Mark A. Franklin,
Roger D. Chamberlain:
A Federated Simulation Environment for Hybrid Systems.
PADS 2007: 198-210 |
| 51 | EE | Roger D. Chamberlain,
Mark A. Franklin,
Eric J. Tyson,
Jeremy Buhler,
Saurabh Gayen,
Patrick Crowley,
James H. Buckley:
Application development on hybrid systems.
SC 2007: 50 |
| 50 | EE | Praveen Krishnamurthy,
Jeremy Buhler,
Roger D. Chamberlain,
Mark A. Franklin,
Kwame Gyang,
Arpith C. Jacob,
Joseph M. Lancaster:
Biosequence Similarity Search on the Mercury System.
VLSI Signal Processing 49(1): 101-121 (2007) |
| 2006 |
|---|
| 49 | EE | Rahul P. Maddimsetty,
Jeremy Buhler,
Roger D. Chamberlain,
Mark A. Franklin,
Brandon Harris:
Accelerator design for protein sequence HMM search.
ICS 2006: 288-296 |
| 48 | EE | Mark A. Franklin,
Eric J. Tyson,
J. Buckley,
Patrick Crowley,
John Maschmeyer:
Auto-pipe and the X language: a pipeline design tool and description language.
IPDPS 2006 |
| 47 | EE | Tilman Wolf,
Mark A. Franklin:
Performance Models for Network Processor Design.
IEEE Trans. Parallel Distrib. Syst. 17(6): 548-561 (2006) |
| 2005 |
|---|
| 46 | EE | Roger D. Chamberlain,
Mark A. Franklin,
Praveen Krishnamurthy,
Abhijit Mahajan:
VLSI Photonic Ring Multicomputer Interconnect: Architecture and Signal Processing Performance.
VLSI Signal Processing 40(1): 57-72 (2005) |
| 2004 |
|---|
| 45 | EE | Praveen Krishnamurthy,
Jeremy Buhler,
Roger D. Chamberlain,
Mark A. Franklin,
Kwame Gyang,
Joseph M. Lancaster:
Biosequence Similarity Search on the Mercury System.
ASAP 2004: 365-375 |
| 44 | EE | Mark A. Franklin,
Roger D. Chamberlain,
Michael Henrichs,
Berkley Shands,
Jason White:
An Architecture for Fast Processing of Large Unstructured Data Sets.
ICCD 2004: 280-287 |
| 43 | EE | Mark A. Franklin,
Vinayak Joshi:
SimplePipe: A Simulation Tool for Task Allocation and Design of Processor Pipelines with Application to Network Processors.
MASCOTS 2004: 59-66 |
| 2003 |
|---|
| 42 | EE | Praveen Krishnamurthy,
Mark A. Franklin,
Roger D. Chamberlain:
Dynamic Reconfiguration of an Optical Interconnect.
Annual Simulation Symposium 2003: 89-97 |
| 41 | | Tilman Wolf,
Prashanth Pappu,
Mark A. Franklin:
Predictive scheduling of network processors.
Computer Networks 41(5): 601-621 (2003) |
| 2002 |
|---|
| 40 | EE | Tilman Wolf,
Mark A. Franklin:
Design Tradeoffs for Embedded Network Processors.
ARCS 2002: 149-164 |
| 39 | EE | Roger D. Chamberlain,
Mark A. Franklin,
Praveen Krishnamurthy:
Optical Network Reconfiguration for Signal Processing Applications.
ASAP 2002: 344- |
| 38 | EE | Michael D. DeVore,
Roger D. Chamberlain,
George Engel,
Joseph A. O'Sullivan,
Mark A. Franklin:
Tradeoffs Between Quality of Results and Resource Consumption in a Recognition System.
ASAP 2002: 391- |
| 37 | EE | Roger D. Chamberlain,
Ch'ng Shi Baw,
Mark A. Franklin,
Christopher Hackmann,
Praveen Krishnamurthy,
Abhijit Mahajan,
Michael Wrighton:
Evaluating the Performance of Photonic Interconnection Networks.
Annual Simulation Symposium 2002: 209-218 |
| 36 | EE | Roger D. Chamberlain,
Mark A. Franklin,
Ch'ng Shi Baw:
Gemini: An Optical Interconnection Network for Parallel Processing.
IEEE Trans. Parallel Distrib. Syst. 13(10): 1038-1055 (2002) |
| 2001 |
|---|
| 35 | EE | Stefan Hendrata,
Mark A. Franklin:
Performance Comparison of Parallel Finite Element and Monte Carlo Methods in Optical Tomography.
ICPP Workshops 2001: 51-58 |
| 34 | | Roger D. Chamberlain,
Mark A. Franklin,
Abhijit Mahajan:
VLSI Photonic Ring Interconnect for Embedded Multicomputers: Architecture and Performance.
ISCA PDCS 2001: 351-358 |
| 1999 |
|---|
| 33 | EE | Ch'ng Shi Baw,
Roger D. Chamberlain,
Mark A. Franklin:
Fair Scheduling in an Optical Interconnection Network.
MASCOTS 1999: 56- |
| 1998 |
|---|
| 32 | EE | Mark A. Franklin,
Prithvi Prabhu:
Performance Optimization of Self-Timed Circuits.
Great Lakes Symposium on VLSI 1998: 374-379 |
| 1996 |
|---|
| 31 | EE | Vasudha Govindan,
Mark A. Franklin:
Application Load Imbalance on Parallel Processors.
IPPS 1996: 836-842 |
| 30 | | Kenneth F. Wong,
Mark A. Franklin:
Checkpointing in Distributed Computing Systems.
J. Parallel Distrib. Comput. 35(1): 67-75 (1996) |
| 29 | | Mark A. Franklin,
Vasudha Govindan:
A General Matrix Iterative Model for Dynamic Load Balancing.
Parallel Computing 22(7): 969-989 (1996) |
| 1995 |
|---|
| 28 | EE | Chia-Hsing Chien,
Mark A. Franklin,
Tienyo Pan,
Prithvi Prabhu:
ARAS: asynchronous RISC architecture simulator.
ASYNC 1995: 210- |
| 27 | EE | Roger D. Chamberlain,
Gregory D. Peterson,
Mark A. Franklin,
Michael A. Province:
Genetic epidemiology, parallel algorithms, and workstation networks.
HICSS (5) 1995: 101-111 |
| 1994 |
|---|
| 26 | | Vasudha Govindan,
Mark A. Franklin:
Speculative Computation: Overcoming Communication Delays.
ICPP (3) 1994: 12-16 |
| 25 | | Vasudha Govindan,
Mark A. Franklin:
Effect of Control Parameters on Dynamic Load Balancing.
IPPS 1994: 452-460 |
| 1993 |
|---|
| 24 | | Kenneth F. Wong,
Mark A. Franklin:
Distributed Computing Systems and Checkpointing.
HPDC 1993: 224-233 |
| 23 | EE | Mark A. Franklin,
Tienyo Pan:
Clocked and asynchronous instruction pipelines.
MICRO 1993: 177-184 |
| 22 | | Roger D. Chamberlain,
Mark A. Franklin:
Performance Effects of Synchronization in Parallel Processors.
SPDP 1993: 611-616 |
| 1991 |
|---|
| 21 | | Roger D. Chamberlain,
Mark A. Franklin:
Analysis of Parallel Mixed-Mode Simulation Algorithms.
IPPS 1991: 155-160 |
| 20 | EE | Ellen E. Witte,
Roger D. Chamberlain,
Mark A. Franklin:
Parallel Simulated Annealing using Speculative Computation.
IEEE Trans. Parallel Distrib. Syst. 2(4): 483-494 (1991) |
| 1990 |
|---|
| 19 | | Ellen E. Witte,
Roger D. Chamberlain,
Mark A. Franklin:
Parallel Simulated Annealing Using Speculative Computation.
ICPP (3) 1990: 286-290 |
| 1989 |
|---|
| 18 | | Ken Wong,
Mark A. Franklin:
Performance Analysis of a Parallel Logic Simulation Machine.
J. Parallel Distrib. Comput. 7(3): 416-440 (1989) |
| 1987 |
|---|
| 17 | | Kenneth F. Wong,
Mark A. Franklin:
Performance Analysis and Design of a Logic Simulation Machine.
ISCA 1987: 46-55 |
| 1986 |
|---|
| 16 | EE | Kenneth F. Wong,
Mark A. Franklin,
Roger D. Chamberlain,
B. L. Shing:
Statistics on logic simulation.
DAC 1986: 13-19 |
| 15 | | Mark A. Franklin,
Sanjay Dhar:
On Designing Interconnection Networks for Multiprocessors.
ICPP 1986: 208-215 |
| 14 | EE | Roger D. Chamberlain,
Mark A. Franklin:
Collecting Data About Logic Simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems 5(3): 405-412 (1986) |
| 13 | | Mark A. Franklin,
Sanjay Dhar:
Interconnection Networks: Physical Design and Performance Analysis.
J. Parallel Distrib. Comput. 3(3): 352-372 (1986) |
| 1983 |
|---|
| 12 | | Sanjay Dhar,
Mark A. Franklin,
Donald F. Wann:
Timing Control of VLSI Based NlogN and Crossbar Networks.
ICPP 1983: 59-64 |
| 11 | | Donald F. Wann,
Mark A. Franklin:
Asynchronous and Clocked Control Structures for VSLI Based Interconnection Networks.
IEEE Trans. Computers 32(3): 284-293 (1983) |
| 1982 |
|---|
| 10 | EE | Mark A. Franklin,
Donald F. Wann:
Asynchronous and clocked control structures for VLSI based interconnection networks.
ISCA 1982: 50-59 |
| 9 | | Mark A. Franklin,
Donald F. Wann,
William J. Thomas:
Pin Limitations and Partitioning of VLSI Interconnection Networks.
IEEE Trans. Computers 31(11): 1109-1116 (1982) |
| 1981 |
|---|
| 8 | | Mark A. Franklin,
Norman L. Soong:
One-Dimensional Optimization on Multiprocessor Systems.
IEEE Trans. Computers 30(1): 61-66 (1981) |
| 7 | | Mark A. Franklin:
VLSI Performance Comparison of Banyan and Crossbar Communications Networks.
IEEE Trans. Computers 30(4): 283-291 (1981) |
| 1979 |
|---|
| 6 | | Mark A. Franklin,
S. A. Kahn,
M. J. Stucki:
Design Issues in the Development of a Modular Mutliprocessor Communications Network.
ISCA 1979: 182-187 |
| 1978 |
|---|
| 5 | | Mark A. Franklin,
G. Scott Graham,
Ram K. Gupta:
Anomalies with Variable Partition Paging Algorithms.
Commun. ACM 21(3): 232-236 (1978) |
| 4 | | Mark A. Franklin:
Parallel Solution of Ordinary Differential Equations.
IEEE Trans. Computers 27(5): 413-420 (1978) |
| 3 | | Ram K. Gupta,
Mark A. Franklin:
Working Set and Page Fault Frequency Paging Algorithms: A Performance Comparison.
IEEE Trans. Computers 27(8): 706-712 (1978) |
| 1975 |
|---|
| 2 | | Robert P. Bogott,
Mark A. Franklin:
Evaluation of Markov Program Models in Virtual Memory Systems.
Softw., Pract. Exper. 5(4): 337-346 (1975) |
| 1974 |
|---|
| 1 | | Mark A. Franklin,
Ram K. Gupta:
Computation of Page Fault Probability from Program Transition Diagram.
Commun. ACM 17(4): 186-191 (1974) |
