| |
| 1998 | ||
|---|---|---|
| 2 | EE | Mark A. Franklin, Prithvi Prabhu: Performance Optimization of Self-Timed Circuits. Great Lakes Symposium on VLSI 1998: 374-379 |
| 1995 | ||
| 1 | EE | Chia-Hsing Chien, Mark A. Franklin, Tienyo Pan, Prithvi Prabhu: ARAS: asynchronous RISC architecture simulator. ASYNC 1995: 210- |
| 1 | Chia-Hsing Chien | [1] |
| 2 | Mark A. Franklin | [1] [2] |
| 3 | Tienyo Pan | [1] |