| |
| 1995 | ||
|---|---|---|
| 2 | EE | Chia-Hsing Chien, Mark A. Franklin, Tienyo Pan, Prithvi Prabhu: ARAS: asynchronous RISC architecture simulator. ASYNC 1995: 210- |
| 1993 | ||
| 1 | EE | Mark A. Franklin, Tienyo Pan: Clocked and asynchronous instruction pipelines. MICRO 1993: 177-184 |
| 1 | Chia-Hsing Chien | [2] |
| 2 | Mark A. Franklin | [1] [2] |
| 3 | Prithvi Prabhu | [2] |