| 2004 |
|---|
| 13 | EE | Stephen Bailey,
Erich Marschner,
Jayaram Bhasker,
Jim Lewis,
Peter J. Ashenden:
Improving Design and Verification Productivity with VHDL-200x.
DATE 2004: 332-335 |
| 12 | EE | David L. Andrews,
Douglas Niehaus,
Peter J. Ashenden:
Programming Models for Hybrid CPU/FPGA Chips.
IEEE Computer 37(1): 118-120 (2004) |
| 11 | | Peter J. Ashenden:
Policies and procedures - who needs them?
IEEE Design & Test of Computers 21(2): 157-158 (2004) |
| 10 | EE | David L. Andrews,
Douglas Niehaus,
Razali Jidin,
Michael Finley,
Wesley Peck,
Michael Frisbie,
Jorge L. Ortiz,
Ed Komp,
Peter J. Ashenden:
Programming Models for Hybrid FPGA-CPU Computational Components: A Missing Link.
IEEE Micro 24(4): 42-53 (2004) |
| 2003 |
|---|
| 9 | | Peter J. Ashenden:
Boundary Scan Test Standards.
IEEE Design & Test of Computers 20(1): 91-92 (2003) |
| 8 | | Peter J. Ashenden:
VHDL-200X: The Next Revision.
IEEE Design & Test of Computers 20(3): 112-113 (2003) |
| 2002 |
|---|
| 7 | | Peter J. Ashenden:
What Makes a Good Standard?
IEEE Design & Test of Computers 19(3): 114-115 (2002) |
| 6 | | Peter J. Ashenden:
Standards: Technical activities in Accellera.
IEEE Design & Test of Computers 19(6): 106, 109 (2002) |
| 2001 |
|---|
| 5 | | Peter J. Ashenden:
VHDL Standards.
IEEE Design & Test of Computers 18(5): 122-123 (2001) |
| 1999 |
|---|
| 4 | EE | Peter J. Ashenden,
Philip A. Wilsey:
Protected Shared Variables in VHDL: IEEE Standard 1076a.
IEEE Design & Test of Computers 16(4): 74-83 (1999) |
| 1998 |
|---|
| 3 | EE | Peter J. Ashenden,
Philip A. Wilsey:
Extensions to VHDL for Abstraction of Concurrency and Communication.
MASCOTS 1998: 301-308 |
| 2 | EE | Peter J. Ashenden,
Philip A. Wilsey,
Dale E. Martin:
SUAVE: Extending VHDL to Improve Data Modeling Support.
IEEE Design & Test of Computers 15(2): 34-44 (1998) |
| 1988 |
|---|
| 1 | | Peter J. Ashenden,
Chris D. Marlin:
A Behavioural Specification of Cache Coherence.
Australian Computer Journal 20(2): 50-57 (1988) |
