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James A. Barby

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2004
8 Michael M. Yang, James A. Barby: A novel fast low voltage dynamic threshold true single phase clocking adiabatic circuit. ISCAS (2) 2004: 289-292
1995
7 S. M. GadelRab, James A. Barby, Savvas G. Chamberlain: An Architecture for Integrated Reliability Simulators Using Analog Hardware Description Languages. ISCAS 1995: 897-900
1993
6 James A. Barby: Switched-Current Filter Models for Frequency Analysis in the Continuous-time Domain. ISCAS 1993: 1427-1430
1991
5EEGenhong Ruan, Jiri Vlach, James A. Barby, Ajoy Opal: Analog functional simulator for multilevel systems. IEEE Trans. on CAD of Integrated Circuits and Systems 10(5): 565-576 (1991)
4EEJiri Vlach, James A. Barby, Anthony Vannelli, T. Talkhan, C.-J. Richard Shi: Group delay as an estimate of delay in logic. IEEE Trans. on CAD of Integrated Circuits and Systems 10(7): 949-953 (1991)
1990
3EEGenhong Ruan, Jiri Vlach, James A. Barby: Logic simulation with current-limited switches. IEEE Trans. on CAD of Integrated Circuits and Systems 9(2): 133-141 (1990)
1988
2EEJames A. Barby, Jiri Vlach, Kishore Singhal: Polynomial splines for MOSFET model approximation. IEEE Trans. on CAD of Integrated Circuits and Systems 7(5): 557-566 (1988)
1EEGenhong Ruan, Jiri Vlach, James A. Barby: Current-limited switch-level timing simulator for MOS logic networks. IEEE Trans. on CAD of Integrated Circuits and Systems 7(6): 659-667 (1988)

Coauthor Index

1Savvas G. Chamberlain [7]
2S. M. GadelRab [7]
3Ajoy Opal [5]
4Genhong Ruan [1] [3] [5]
5C.-J. Richard Shi [4]
6Kishore Singhal [2]
7T. Talkhan [4]
8Anthony Vannelli [4]
9Jiri Vlach [1] [2] [3] [4] [5]
10Michael M. Yang [8]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)