| 2004 |
|---|
| 8 | | Michael M. Yang,
James A. Barby:
A novel fast low voltage dynamic threshold true single phase clocking adiabatic circuit.
ISCAS (2) 2004: 289-292 |
| 1995 |
|---|
| 7 | | S. M. GadelRab,
James A. Barby,
Savvas G. Chamberlain:
An Architecture for Integrated Reliability Simulators Using Analog Hardware Description Languages.
ISCAS 1995: 897-900 |
| 1993 |
|---|
| 6 | | James A. Barby:
Switched-Current Filter Models for Frequency Analysis in the Continuous-time Domain.
ISCAS 1993: 1427-1430 |
| 1991 |
|---|
| 5 | EE | Genhong Ruan,
Jiri Vlach,
James A. Barby,
Ajoy Opal:
Analog functional simulator for multilevel systems.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(5): 565-576 (1991) |
| 4 | EE | Jiri Vlach,
James A. Barby,
Anthony Vannelli,
T. Talkhan,
C.-J. Richard Shi:
Group delay as an estimate of delay in logic.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(7): 949-953 (1991) |
| 1990 |
|---|
| 3 | EE | Genhong Ruan,
Jiri Vlach,
James A. Barby:
Logic simulation with current-limited switches.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(2): 133-141 (1990) |
| 1988 |
|---|
| 2 | EE | James A. Barby,
Jiri Vlach,
Kishore Singhal:
Polynomial splines for MOSFET model approximation.
IEEE Trans. on CAD of Integrated Circuits and Systems 7(5): 557-566 (1988) |
| 1 | EE | Genhong Ruan,
Jiri Vlach,
James A. Barby:
Current-limited switch-level timing simulator for MOS logic networks.
IEEE Trans. on CAD of Integrated Circuits and Systems 7(6): 659-667 (1988) |
