Hitoshi Aida

2008
18	EE	Hitoshi Aida, Shinya Kambori: Effective Use of Heterogeneous Wireless Links in High Speed Railways by Predictive Scheduling. SAINT 2008: 459-462
2006
17	EE	Kultida Rojviboonchai, Toru Osuga, Hitoshi Aida: A Study on Rate-Based Multi-Path Transmission Control Protocol (R-M/TCP) Using Packet Scheduling Algorithm. IEICE Transactions 89-D(1): 124-131 (2006)
2005
16	EE	Kultida Rojviboonchai, Toru Osuga, Hitoshi Aida: R-M/TCP: Protocol for Reliable Multi-Path Transport over the Internet. AINA 2005: 801-806
2002
15	EE	Soichiro Hidaka, Terumasa Aoki, Hitoshi Aida, Tadao Saito: Implementation and performance evaluation of a FIFO queue class library for time warp. Systems and Computers in Japan 33(9): 90-98 (2002)
2001
14		Saneyasu Yamaguchi, Masao Takimoto, Hitoshi Aida, Tadao Saito: Cooperative Backgroud Task Spaces and its Evaluation. DEXA Workshop 2001: 227-231
13	EE	Ryokichi Onishi, Saneyasu Yamaguchi, Hiroaki Morino, Hitoshi Aida, Tadao Saito: The Multi-Agent System for Dynamic Network Routing. ISADS 2001: 375-382
12	EE	Tamaree Nalin, Isobe Takashi, Hiroaki Morino, Hitoshi Aida, Tadao Saito: A Scalable and High Capacity Router on Multi-Dimension Crossbar Switch Principle. LCN 2001: 375-376
2000
11	EE	Hitoshi Aida, Yosuke Tamura, Yoshito Tobe, Hideyuki Tokuda: Wireless Packet Scheduling with Signal-to-Noise Ratio Monitoring. LCN 2000: 32-41
10	EE	Thai Thach Bao, Hiroaki Morino, Hitoshi Aida, Tadao Saito: Distributed Input and Deflection Routing Based Packet Switch Using Shuffle Pattern Network. NETWORKING 2000: 74-84
1999
9		Hiroaki Morino, Hitoshi Aida, Tadao Saito: Distributed Routing Algorithm in Clos Network of Variable Bit Rate TDM Switch. SMARTNET 1999: 177-189
1998
8	EE	Soichiro Hidaka, Terumasa Aoki, Hitoshi Aida, Tadao Saito: A FIFO Queue Class Library as a State Variable of Time Warp Logical Processes. ISCOPE 1998: 151-158
1996
7	EE	Shiro Kawai, Hitoshi Aida, Tadao Saito: Designing Interface Toolkit with Dynamic Selectable Modality. International ACM Conference on Assistive Technologies 1996: 72-79
6	EE	Intae Ryoo, Hitoshi Aida, Tadao Saito: Design and performance analysis of a new RTM algorithm for VBR traffic in ATM networks. Computer Communications 19(3): 205-215 (1996)
1995
5	EE	Masato Oguchi, Hitoshi Aida, Tadao Saito: A Proposal for a DSM Architecture Suitable for a Widely Distributed Environment and its Evaluation. HPDC 1995: 32-39
4	EE	Intae Ryoo, Hitoshi Aida, Hitoshi Saito: Simulation study of a run-time bandwidth assignment technique for delay sensitive traffic in high-speed network. ICNP 1995: 40-46
1990
3		Hitoshi Aida, Joseph A. Goguen, José Meseguer: Compiling Concurrent Rewriting onto the Rewrite Rule Machine. CTRS 1990: 320-332
1984
2		Tohru Moto-Oka, Hidehiko Tanaka, Hitoshi Aida, Keiji Hirata, Tsutomu Maruyama: The Architecture of a Parallel Inference Engine - PIE. FGCS 1984: 479-488
1983
1		Hitoshi Aida, Hidehiko Tanaka, Tohru Moto-Oka: A Prolog Extension for Handling Negative Knowledge. New Generation Comput. 1(1): 87-91 (1983)

Coauthor Index

1	Terumasa Aoki	[8] [15]
2	Thai Thach Bao	[10]
3	Joseph A. Goguen	[3]
4	Soichiro Hidaka	[8] [15]
5	Keiji Hirata	[2]
6	Shinya Kambori	[18]
7	Shiro Kawai	[7]
8	Tsutomu Maruyama	[2]
9	José Meseguer	[3]
10	Hiroaki Morino	[9] [10] [12] [13]
11	Tohru Moto-Oka	[1] [2]
12	Tamaree Nalin	[12]
13	Masato Oguchi	[5]
14	Ryokichi Onishi	[13]
15	Toru Osuga	[16] [17]
16	Kultida Rojviboonchai	[16] [17]
17	Intae Ryoo	[4] [6]
18	Hitoshi Saito	[4]
19	Tadao Saito	[5] [6] [7] [8] [9] [10] [12] [13] [14] [15]
20	Isobe Takashi	[12]
21	Masao Takimoto	[14]
22	Yosuke Tamura	[11]
23	Hidehiko Tanaka	[1] [2]
24	Yoshito Tobe	[11]
25	Hideyuki Tokuda	[11]
26	Saneyasu Yamaguchi	[13] [14]

Colors in the list of coauthors