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Luong Dinh Hung

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2007
6EELuong Dinh Hung, Hidetsugu Irie, Masahiro Goshima, Shuichi Sakai: Utilization of SECDED for soft error and variation-induced defect tolerance in caches. DATE 2007: 1134-1139
2006
5EELuong Dinh Hung, Masahiro Goshima, Shuichi Sakai: SEVA: A Soft-Error- and Variation-Aware Cache Architecture. PRDC 2006: 47-54
2005
4EELuong Dinh Hung, Masahiro Goshima, Shuichi Sakai: Mitigating Soft Errors in Highly Associative Cache with CAM-based Tag. ICCD 2005: 342-350
3EELuong Dinh Hung, Shuichi Sakai: Dynamic Estimation of Task Level Parallelism with Operating System Support. ISPAN 2005: 358-363
2003
2EEHideyuki Miura, Luong Dinh Hung, Chitaka Iwama, Daisuke Tashiro, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka: Compiler-Assisted Thread Level Control Speculation. Euro-Par 2003: 603-608
1EEYoshimitsu Yanagawa, Luong Dinh Hung, Chitaka Iwama, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka: Complexity Analysis of a Cache Controller for Speculative Multithreading Chip Multiprocessors. HiPC 2003: 393-404

Coauthor Index

1Niko Demus Barli [1] [2]
2Masahiro Goshima [4] [5] [6]
3Hidetsugu Irie [6]
4Chitaka Iwama [1] [2]
5Hideyuki Miura [2]
6Shuichi Sakai [1] [2] [3] [4] [5] [6]
7Hidehiko Tanaka [1] [2]
8Daisuke Tashiro [2]
9Yoshimitsu Yanagawa [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)