2008 |
6 | EE | Tao Luo,
David A. Papa,
Zhuo Li,
Chin-Ngai Sze,
Charles J. Alpert,
David Z. Pan:
Pyramids: an efficient computational geometry-based approach for timing-driven placement.
ICCAD 2008: 204-211 |
5 | EE | David A. Papa,
Tao Luo,
Michael D. Moffitt,
Chin-Ngai Sze,
Zhuo Li,
Gi-Joon Nam,
Charles J. Alpert,
Igor L. Markov:
RUMBLE: an incremental, timing-driven, physical-synthesis optimization algorithm.
ISPD 2008: 2-9 |
4 | EE | David A. Papa,
Tao Luo,
Michael D. Moffitt,
Chin-Ngai Sze,
Zhuo Li,
Gi-Joon Nam,
Charles J. Alpert,
Igor L. Markov:
RUMBLE: An Incremental Timing-Driven Physical-Synthesis Optimization Algorithm.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2156-2168 (2008) |
2007 |
3 | EE | Shiyan Hu,
Charles J. Alpert,
Jiang Hu,
Shrirang K. Karandikar,
Zhuo Li,
Weiping Shi,
Chin-Ngai Sze:
Fast Algorithms for Slew-Constrained Minimum Cost Buffering.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(11): 2009-2022 (2007) |
2 | EE | Chin-Ngai Sze,
Charles J. Alpert,
Jiang Hu,
Weiping Shi:
Path-Based Buffer Insertion.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(7): 1346-1355 (2007) |
2005 |
1 | EE | Yongqiang Lu,
Chin-Ngai Sze,
Xianlong Hong,
Qiang Zhou,
Yici Cai,
Liang Huang,
Jiang Hu:
Navigating Register Placement for Low Power Clock Network Design.
IEICE Transactions 88-A(12): 3405-3411 (2005) |